DA28F640J5-150 Intel, DA28F640J5-150 Datasheet - Page 25

• Manufacturer Part Number: DA28F640J5-150
• Description: Flash Mem Parallel 5V 64M-Bit 8M x 8/4M x 16 150ns 56-Pin SSOP
• Manufacturer: Intel

Specifications of DA28F640J5-150

• Package: 56SSOP
• Cell Type: NOR
• Density: 64 Mb
• Architecture: Sectored
• Block Organization: Symmetrical
• Typical Operating Supply Voltage: 5 V
• Sector Size: 128KByte x 64
• Support Of Common Flash Interface: Yes
• Timing Type: Asynchronous
• Operating Temperature: 0 to 70 °C
• Interface Type: Parallel

4.2.7
Certain flash features and commands are optional. The Primary Vendor-Specific Extended Query table
specifies this and other similar information.
NOTE:
1. The Primary Vendor-Specific Extended Query table (P) address may change among SCS-compliant devices. Software
Offset
should retrieve this address from address 15 to guarantee compatibility with future SCS-compliant devices.
(P +A)h
ADVANCE INFORMATION
(P +3)h
(P +4)h
(P +5)h
(P +9)h
(P)h
(1)
PRIMARY-VENDOR SPECIFIC EXTENDED QUERY TABLE
Length
(bytes)
03h
01h
01h
04h
01h
02h
Primary extended Query table unique ASCII string “PRI”
Major version number, ASCII
Minor version number, ASCII
Optional Feature and Command Support
Supported functions after Suspend
Read Array, Status, and Query are always supported
during suspended Erase. This field defines other
operations supported.
Block Status Register Mask
Defines which bits in the Block Status Register section of
Query are implemented.
Table 12. Primary Vendor-Specific Extended Query
bit 0
bit 1
bit 2
bit 3
bit 4
bits 5–31
bit 0
(1=yes, 0=no)
bits 1–7
bit 0
bit 1
bits 2–15
INTEL StrataFlash™ MEMORY TECHNOLOGY, 32 AND 64 MBIT
Chip Erase Supported
Suspend Erase Supported
Suspend Program Supported
Lock/Unlock Supported
Queued Erase Supported
Program supported after Erase Suspend
Block Status Register Lock Bit [BSR.0] active
(1=yes, 0=no)
Block Status Register Valid Bit [BSR.1] active
(1=yes, 0=no)
Reserved for future use; undefined bits
are “0”
Reserved for future use; undefined bits
are “0”
Reserved for future use; undefined bits
are “0”
Description
(1=yes, 0=no)
(1=yes, 0=no)
(1=yes, 0=no)
(1=yes, 0=no)
(1=yes, 0=no)
31:
32:
33:
34:
35:
36:
37:
38:
39:
3A:
3B:
3C:
StrataFlash™
Memory
Intel
0050h
0052h
0049h
0031
0031
000Ah
0000h
0000h
0000h
0001h
0001h
0000h
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