GS842Z36AGB-150 GSI TECHNOLOGY, GS842Z36AGB-150 Datasheet - Page 20

• Manufacturer Part Number: GS842Z36AGB-150
• Description: 58M6829
• Manufacturer: GSI TECHNOLOGY

Specifications of GS842Z36AGB-150

• Memory Size: 4Mbit
• Memory Configuration: 128K X 36
• Clock Frequency: 150MHz
• Access Time: 10ns
• Supply Voltage Range: 2.3V To 2.7V, 3V To 3.6V
• Memory Case Style: BGA
• No. Of Pins: 119
• Rohs Compliant: Yes

Register, under the control of the TAP Controller, is loaded with the contents of the RAMs I/O ring when the controller is in
Capture-DR state and then is placed between the TDI and TDO pins when the controller is moved to Shift-DR state. SAMPLE-Z,
SAMPLE/PRELOAD and EXTEST instructions can be used to activate the Boundary Scan Register.
Identification (ID) Register
The ID Register is a 32-bit register that is loaded with a device and vendor specific 32-bit code when the controller is put in
Capture-DR state with the IDCODE command loaded in the Instruction Register. The code is loaded from a 32-bit on-chip ROM.
It describes various attributes of the RAM as indicated below. The register is then placed between the TDI and TDO pins when the
controller is moved into Shift-DR state. Bit 0 in the register is the LSB and the first to reach TDO when shifting begins.
Rev: 1.04b 1/2009
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
TDI
TMS
TCK
·
·
·
·
Test Access Port (TAP) Controller
Bypass Register
Instruction Register
ID Code Register
2
31 30 29
0
JTAG TAP Block Diagram
Boundary Scan Register
·
1
0
Control Signals
20/29
·
·
· · ·
·
2
1
0
·
·
·
GS842Z18/36AB-180/166/150/100
·
TDO
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