74HC107D NXP Semiconductors, 74HC107D Datasheet - Page 7
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74HC107D
Manufacturer Part Number
74HC107D
Description
Flip Flops DUAL J-K W/NEG-EDGE TRIG
Manufacturer
NXP Semiconductors
Datasheet
1.74HC107D653.pdf
(7 pages)
Specifications of 74HC107D
Number Of Circuits
2
Logic Family
HC
Logic Type
J-K Negative Edge Triggered Flip Flop
Polarity
Inverting/Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
16 ns at 5 V
High Level Output Current
- 5.2 mA
Supply Voltage (max)
6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-108
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
2 V
Lead Free Status / Rohs Status
Details
Other names
74HC107D,652
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74HC107D
Manufacturer:
NEXPERIA/安世
Quantity:
20 000
Part Number:
74HC107D,653
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Philips Semiconductors
AC WAVEFORMS
PACKAGE OUTLINES
See
December 1990
Dual JK flip-flop with reset; negative-edge trigger
The shaded areas indicate when the input is permitted to
change for predictable output performance.
(1) HC : V
Fig.6
(1) HC : V
Fig.7
“74HC/HCT/HCU/HCMOS Logic Package Outlines”
HCT: V
HCT: V
Waveforms showing the clock (nCP) to output (nQ, nQ) propagation delays, the clock pulse width, the J
and K to nCP set-up and hold times, the output transition times and the maximum clock pulse frequency.
Waveforms showing the reset (nR) input to output (nQ, nQ) propagation delays, the reset pulse width and
the nR to nCP removal time.
M
M
M
M
= 50%; V
= 50%; V
= 1.3 V; V
= 1.3 V; V
I
I
I
I
= GND to V
= GND to V
= GND to 3 V.
= GND to 3 V.
CC
CC
.
.
.
7
74HC/HCT107
Product specification