GAL26CV12B-20LP Lattice, GAL26CV12B-20LP Datasheet - Page 6

• Manufacturer Part Number: GAL26CV12B-20LP
• Description: SPLD - Simple Programmable Logic Devices HI PERF E2CMOS PLD
• Manufacturer: Lattice

Specifications of GAL26CV12B-20LP

• Logic Family: GAL
• Number Of Macrocells: 12
• Maximum Operating Frequency: 62.5 MHz
• Number Of Programmable I/os: 12
• Delay Time: 20 ns
• Operating Supply Voltage: 5 V
• Supply Current: 130 mA
• Maximum Operating Temperature: + 75 C
• Minimum Operating Temperature: 0 C
• Package / Case: PDIP-28
• Mounting Style: Through Hole
• Supply Voltage (max): 5.25 V
• Supply Voltage (min): 4.75 V
• Lead Free Status / Rohs Status: No

GAL26CV12 Logic Diagram/JEDEC Fuse Map
10
11
12
13
14
1
2
3
4
5
6
8
9
0000
0052
0468
0520
0936
0988
1404
1456
1872
1924
2444
2496
3120
3172
3796
3848
4368
4420
4836
4888
5304
5356
5772
5824
6240
6292
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0
4
8
M
6368, 6369 ...
Byte 7 Byte 6 Byte 5 Byte 4
S
B
12
S
B
L
16
20
DIP & PLCC Package Pinouts
Electronic Signature
24
28
Byte 3
32
36
Byte 2 Byte 1 Byte 0
5
40
... 6430, 6431
44
Specifications GAL26CV12
48
10
12
12
10
8
8
8
8
8
8
8
8
OLMC
OLMC
OLMC
OLMC
OLMC
OLMC
OLMC
OLMC
OLMC
OLMC
OLMC
OLMC
ASYNCHRONOUS RESET
(TO ALL REGISTERS)
SYNCHRONOUS PRESET
(TO ALL REGISTERS)
6344
6345
6346
6347
6348
6349
6350
6351
6352
6353
6354
6355
6356
6357
6358
6359
6360
6361
6362
6363
6364
6365
6366
6367
S0
S1
S0
S1
S0
S1
S0
S1
S0
S1
S0
S1
S0
S1
S0
S1
S0
S1
S0
S1
S0
S1
S0
S1
28
27
26
25
24
23
22
20
19
18
17
16
15