TDA5230XT Infineon Technologies, TDA5230XT Datasheet - Page 44

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TDA5230XT

Manufacturer Part Number
TDA5230XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of TDA5230XT

Operating Temperature (min)
-40C
Operating Temperature (max)
105C
Operating Temperature Classification
Industrial
Product Depth (mm)
4.4mm
Product Length (mm)
9.7mm
Lead Free Status / Rohs Status
Compliant
CMC0:
ADDR:
RFPLLAC:
ADDR:
Dual:
ADDR:
The following state diagrams and explanations help to illustrate the behavior during Self
Polling Mode. First, there is a wake up search for a wake up pattern according
configuration A on up to three different channels. Then, there is an optional search for a
wake up pattern according configuration B, again including up to 3 channels.
In applications using only a single configuration, settings are always taken from
Configuration A
Data Sheet
1:0
3:2
Bit R/W Description
Bit R/W Description
Bit R/W Description
2
W
AMT
W
R
0x02
0x06
0x21
Chip Mode Control Register 0
DCE: Dual Configuration Enable
This Bit is relevant only in Self Polling Mode. It defines whether both
configurations are used.
0: Only Config A is used
1: First Config A is used; then Config B is used
RFPLLACS: Actual Channel
This register is set after a Wake Up found in the Self Polling Mode
00b: No channel was actually found
01b: Channel 1 according to RFPLL1 setting was found
10b: Channel 2 according to RFPLL2 setting was found
11b: Channel 3 according to RFPLL3 setting was found
NOC: Number of channels
Only used in the Self Polling Mode to define how many channels have to be
scanned. In the Slave Mode there is only 1 channel used, whatever here is
configured.
Min: 01b = 1 channel
Max: 11b= 3 channels
and BMT:
RF PLL Actual Channel Register
and
0x42
Conf.A Modulation Type Register
40
Functional Description
Reset Value: 0x40
Reset Value: 0x00
Reset Value: 0x04
Version 4.0, 2007-06-01
TDA523x

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