TDA5230XT Infineon Technologies, TDA5230XT Datasheet - Page 150

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TDA5230XT

Manufacturer Part Number
TDA5230XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of TDA5230XT

Operating Temperature (min)
-40C
Operating Temperature (max)
105C
Operating Temperature Classification
Industrial
Product Depth (mm)
4.4mm
Product Length (mm)
9.7mm
Lead Free Status / Rohs Status
Compliant
Dual:
Mode)
ADDR:
1) Channels with receive frequencies close to the harmonics of the reference crystal frequency should not be
Dual:
ADDR:
Dual:
ADDR:
Data Sheet
4:2
1:0
1:0
7:0
Bit R/W Description
Bit R/W Description
Bit R/W Description
used in applications.
ARFPLL3
W
W
AWUC
W
AWUPAT0
W
0x24
0x25
0x26
RFPLLR3: Channel 3, PLL Divider Factor R
000 : R = 8
001 : R = 1
010 : R = 2
011 : R = 3
100 : R = 4
101 : R = 5
110 : R = 6
111 : R = 7
RFPLLS3: Channel 3, PLL Divider Factor S
00 : S = 1
01 : S = 0
10 : S = -1
11 : S = 0
WUCRT: Wake Up Criteria
00b: Pattern Detection
01b: Random Bits
10b: Equal Bits
11b: Wake Up on Symbol Sync, Valid Data Rate; the WUBCNT Register is
WUPAT0: Wake Up Detection Pattern: Bit 7...Bit 0(LSB) (in Chips)
and
and
and
and BWUC:
0x45
0x46
0x47
and BRFPLL3:
not used in this mode.
and BWUPAT0:
Conf. A Wake up Control Register
Conf. A RF PLL setting, channel 3 (Self Polling
Conf. A Wake Up Detection Pattern 0
146
1)
1)
Register Descriptions
Reset Value: 0x0A
Reset Value:0x00
Reset Value:0x00
Version 4.0, 2007-06-01
TDA523x

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