DS90C3202VS National Semiconductor, DS90C3202VS Datasheet
DS90C3202VS
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DS90C3202VS Summary of contents
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... Gbps (945 Mbytes/s). This allows the dual 10-bit LVDS Receiver to support resolutions up to HDTV. Block Diagram © 2006 National Semiconductor Corporation Features 9.45 Gbit/s data throughput n 8 MHz to 135 MHz input clock support n Supports up to QXGA panel resolutions ...
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Typical Application Diagram Functional Description The DS90C3201 and DS90C3202 are a dual 10-bit color Transmitter and Receiver FPD-Link chipset designed to transmit data at clocks speeds from 8 to 135 MHz. DS90C3201 and DS90C3202 are designed to interface be- tween ...
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... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( LVCMOS/LVTTL Input Voltage −0. LVCMOS/LVTTL Output Voltage −0. LVDS Receiver Input Voltage −0. Junction Temperature Storage Temperature Lead Temperature (Soldering, 10 sec ...
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Electrical Characteristics Over recommended operating supply and temperature ranges unless otherwise specified. Symbol Parameter RECEIVER SUPPLY CURRENT ICCRW Receiver Supply Current Worst Case (Figures 2, 4) ICCRG Receiver Supply Current Incremental Test Pattern (Figures 3, 4) ICCRZ Receiver Supply Current ...
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Receiver Switching Characteristics Over recommended operating supply and temperature ranges unless otherwise specified. Symbol Parameter CLHT LVCMOS/LVTTL Low-to-High Transition Time 8pF, (Figure 5) (Note 8) L Register addr 28d/1ch, bit [2] (RCLK)=0b (Default), bit [1] (RXE) =0b (Default), ...
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Two-Wire Serial Communication Interface Over recommended operating supply and temperature ranges unless otherwise specified. Symbol Parameter f S2CLK Clock Frequency SC SC:LOW Clock Low Period SC:HIGH Clock High Period SCD:TR S2CLK and S2DAT Rise Time SCD:TF S2CLK and S2DAT Fall ...
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AC Timing Diagrams (Continued) FIGURE 4. Typical and Max ICC with Worse Case and Incremental Pattern FIGURE 5. LVCMOS/LVTTL Output Load and Transition Times FIGURE 2. “Worst Case” Test Pattern FIGURE 3. Incremental Test Pattern 20147105 7 20147103 20147104 20147106 ...
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AC Timing Diagrams FIGURE 6. Receiver Phase Lock Loop Wake-up Time www.national.com (Continued) FIGURE 7. Powerdown Delay FIGURE 8. Receiver Propagation Delay 8 20147107 20147108 20147109 ...
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AC Timing Diagrams (Continued) FIGURE 9. RFB: LVTTL Level Programmable Strobe Select RITOL ≥ Cable Skew (type, length) + Source Clock Jitter (cycle to cycle) (Note 11) + ISI (Inter-symbol interference) (Note 12) Cable Skew — typically 10 ps–40 ps ...
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AC Timing Diagrams FIGURE 12. Receiver RSRC and RHRC Output Setup/Hold Time — PTO Enabled FIGURE 13. Receiver RSRC and RHRC Output Setup/Hold Time Adjustment — PTO Disabled www.national.com (Continued) RegisterAddress 29d/1dh bit [2:1] = 00b 10 20147113 20147114 ...
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AC Timing Diagrams (Continued) FIGURE 14. Receiver RSRC and RHRC Output Setup/Hold Time Adjustment — PTO Enabled 11 20147115 www.national.com ...
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AC Timing Diagrams www.national.com (Continued) FIGURE 15. LVDS Input Mapping 12 20147116 ...
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AC Timing Diagrams (Continued) FIGURE 16. Receiver RITOL Min and Max 13 20147117 www.national.com ...
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Pin Diagram www.national.com DS90C3202 Receiver 14 20147118 ...
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DS90C3202 Pin Descriptions Pin No. Pin Name 1 S2DAT 2 S2CLK 3 VDDP1 4 VSSP1 5 VSSP0 6 VDDP0 7 PWDNB 8 RXEE0 9 RXEE1 10 RXEE2 11 RXEE3 12 RXEE4 13 RXEE5 14 RXEE6 15 VSS0 16 VDD0 17 ...
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DS90C3202 Pin Descriptions Pin No. Pin Name 46 VDD2 47 RXEA0 48 RXEA1 49 RXEA2 50 RXEA3 51 RXEA4 52 RXEA5 53 RXEA6 54 VSS3 55 VDD3 56 RXOE0 57 RXOE1 58 RXOE2 59 RXOE3 60 RXOE4 61 RXOE5 62 ...
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DS90C3202 Pin Descriptions Pin No. Pin Name 92 RXOA4 93 RXOA5 94 RXOA6 95 VDD5 96 VSS5 97 RESRVD 98 MODE1 99 VSSL 100 VDDL 101 RXOA- 102 RXOA+ 103 RXOB- 104 RXOB+ 105 RXOC- 106 RXOC+ 107 RXOD- 108 ...
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Two-Wire Serial Communication Interface Description The DS90C3202 operates as a slave on the Serial Bus, so the S2CLK line is an input (no clock is generated by the DS90C3202) and the S2DAT line DS90C3202 has a fixed 7bit slave address. ...
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DS90C3202 Two-Wire Serial Interface Register Table Address R/W RESET 0d/0h R PWDN 1d/1h R PWDN 2d/2h R PWDN 3d/3h R PWDN 4d/4h R PWDN 5d/5h R PWDN 6d/6h R PWDN 7d/7h R PWDN 8d/8h R PWDN 9d/9h R PWDN 10d/ah ...
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DS90C3202 Two-Wire Serial Interface Register Table Address R/W RESET 26d/1ah R/W None 27d/1bh R/W None 28d/1ch R/W None 29d/1dh R/W None www.national.com Bit # Description [7] Reserved [6:4] LVDS input skew control for RXE channel B, 000 (default) applies to ...
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DS90C3202 Two-Wire Serial Interface Register Table Address R/W RESET 30d/1eh R/W None 31d/1fh R/W None Note 13: Registers with RESET designated with “None” requires device to be power cycled to reset register values to their default state. Bit # Description ...
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... Deutsch Tel: +49 (0) 69 9508 6208 English www.national.com Français Tel: +33 ( 8790 128-Pin TQFP Package Order Number DS90C3202VS NS Package Number VJX128A 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system affect its safety or effectiveness ...