PSB4860HV4.1 Lantiq, PSB4860HV4.1 Datasheet - Page 110

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PSB4860HV4.1

Manufacturer Part Number
PSB4860HV4.1
Description
Manufacturer
Lantiq
Datasheet

Specifications of PSB4860HV4.1

Lead Free Status / Rohs Status
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Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PSB4860HV4.1
Manufacturer:
INFINEON/英飞凌
Quantity:
20 000
Data Sheet
Procedure:
1. Preparation
2. Entering Emergency Mode
3. Data transmission from controller to
Table 86
4. Data transmission from to memory
5. Recovery
Transfer Emergency Data
If a file command is currently running (except record, playback or phrase playback)
then the file command must be aborted by setting the ICA bit of register FCMD.
The file command will be aborted within 15 ms (all memories except Toshiba) or
110 ms (worst case Toshiba).
This step is completed when the BSY bit of the STATUS register is reset.
Emergency mode is entered by setting bit EM of the CCTL register.
This step is completed when the RDY bit of the STATUS register is set again.
The controller can transfer any amount of data in steps of three bytes each from three
bytes to 2046 bytes. This data transfer does not use any handshake mechanism. At
a SCLK frequency of 2 MHz, the controller can issue data transfer commands at full
speed.
There are two commands available (Table 86):
The Transfer Emergency Data command is a special type of a Write Register
Command (Table 95 and Figure 61). Each Transfer Emergency Data command
transfers three bytes of data to the . The first byte is already encoded in the command
word itself while the next two bytes are transmitted in the data word.
Once all data bytes have been transferred, a Write to Memory Command with a
dummy data word must be given. This has to be done even if no byte was and neither
needs to be transferred.
After receiving the Write to Memory command the automatically starts to transfer all
received data to the reserved block in external memory.
This step is completed when the PD bit of register HWCONFIG0 is set (i.e. the is in
power down mode).
Data recovery from the reserved block can be done after the next activation by the
Low Level Memory Management Commands.
Write to Memory
Command Words for Emergency Mode Data Transfer
15
0
0
14
1
1
13
0
0
12
0
0
11
0
1
110
10
1
1
9
0
1
8
1
1
7
0
6
0
5
0
4
Byte 1
0
0
3
PSB 4860
0
2
2000-01-14
0
1
0
0

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