STA333BW STMicroelectronics, STA333BW Datasheet - Page 39

• Manufacturer Part Number: STA333BW
• Manufacturer: STMicroelectronics

Specifications of STA333BW

• Operational Class: Class-AB
• Audio Amplifier Output Configuration: 1-Channel Mono/2-Channel Stereo
• Audio Amplifier Function: Speaker
• Total Harmonic Distortion: 0.2@8Ohm@1W%
• Single Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (typ): 3.3/5/9/12/15/18V
• Power Supply Requirement: Quad
• Rail/rail I/o Type: No
• Power Supply Rejection Ratio: 80dB
• Single Supply Voltage (min): Not RequiredV
• Single Supply Voltage (max): Not RequiredV
• Dual Supply Voltage (min): 2.7/4.5V
• Dual Supply Voltage (max): 3.6/21.5V
• Operating Temp Range: -20C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 36
• Package Type: PowerSSO EP
• Lead Free Status / Rohs Status: Compliant

STA333BW
Invalid input detect mute enable
Table 44.
Setting the IDE bit enables this function, which looks at the input I
mutes if the signals are perceived as invalid.
Binary output mode clock loss detection
Table 45.
Detects loss of input MCLK in binary mode and will output 50% duty cycle.
LRCK double trigger protection
Table 46.
LDTE, when enabled, prevents double trigger of LRCLK on instable I2S input.
Auto EAPD on clock loss
Table 47.
When active, issues a power device power down signal (EAPD) on clock loss detection.
IC power down
Table 48.
2
3
4
5
6
Bit
Bit
Bit
Bit
Bit
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Invalid input detect mute enable
Binary output mode clock loss detection
LRCK double trigger protection
Auto EAPD on clock loss
IC power down
1
1
1
0
1
RST
RST
RST
RST
RST
IDE
BCLE
LDTE
ECLE
PWDN
Doc ID 13773 Rev 3
Name
Name
Name
Name
Name
0: disables the automatic invalid input detect mute
1: enables the automatic invalid input detect mute
0: binary output mode clock loss detection disabled
1: binary output mode clock loss detection enable
0: LRCLK double trigger protection disabled
1: LRCLK double trigger protection enabled
0: auto EAPD on clock loss not enabled
1: auto EAPD on clock loss
0: IC power down low-power condition
1: IC normal operation
Description
Description
Description
Description
Description
2
S data and automatically
Register description
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