MC68HC811E2FN Freescale Semiconductor, MC68HC811E2FN Datasheet - Page 103

• Manufacturer Part Number: MC68HC811E2FN
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC811E2FN

• Cpu Family: HC11
• Device Core Size: 8b
• Frequency (max): 4MHz
• Interface Type: SCI/SPI
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Total Internal Ram Size: 256Byte
• # I/os (max): 38
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 52
• Package Type: PLCC
• Lead Free Status / Rohs Status: Supplier Unconfirmed

CWOM — Port C Wired-OR Mode Bit (affects all eight port C pins)
HNDS — Handshake Mode Bit
OIN — Output or Input Handshake Select Bit
PLS — Pulsed/Interlocked Handshake Operation Bit
EGA — Active Edge for Strobe A Bit
INVB — Invert Strobe B Bit
Freescale Semiconductor
It is customary to have an external pullup resistor on lines that are driven by open-drain devices.
HNDS must be set to 1 for this bit to have meaning.
HNDS must be set to 1 for this bit to have meaning. When interlocked handshake is selected, strobe
B is active until the selected edge of strobe A is detected.
0 = Port C outputs are normal CMOS outputs.
1 = Port C outputs are open-drain outputs.
0 = Simple strobe mode
1 = Full input or output handshake mode
0 = Input handshake
1 = Output handshake
0 = Interlocked handshake
1 = Pulsed handshake (Strobe B pulses high for two E-clock cycles.)
0 = STRA falling edge selected, high level activates port C outputs (output handshake)
1 = STRA rising edge selected, low level activates port C outputs (output handshake)
0 = Active level is logic 0.
1 = Active level is logic 1.
M68HC11E Family Data Sheet, Rev. 5.1
Parallel I/O Control Register
103