70V28L20PFI IDT, Integrated Device Technology Inc, 70V28L20PFI Datasheet - Page 6

• Manufacturer Part Number: 70V28L20PFI
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 70V28L20PFI

• Density: 1Mb
• Access Time (max): 20ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 16b
• Package Type: TQFP
• Operating Temp Range: -40C to 85C
• Number Of Ports: 2
• Supply Current: 220mA
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 16b
• Number Of Words: 64K
• Lead Free Status / Rohs Status: Not Compliant

BUSY
AC Test Conditions
Waveform of Read Cycles
DATA
Timing of Power-Up Power-Down
NOTES:
1. Timing depends on which signal is asserted last, OE, CE, LB or UB.
2. Timing depends on which signal is de-asserted first CE, OE, LB or UB.
3. t
4. Start of valid data depends on which timing becomes effective last t
5. SEM = V
6. Refer to Truth Table I - Chip Enable.
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
IDT70V28L
High-Speed 3.3V 64K x 16 Dual-Port Static RAM
UB, LB
ADDR
relation to valid output data.
BDD
R/W
OUT
OUT
CE
OE
delay is required only in cases where the opposite port is completing a write operation to the same address location. For simultaneous read operations BUSY has no
(6)
IH
.
CE
I
I
CC
SB
(6)
t
t
t
t
AA
ACE
AOE
t
LZ
ABE
(4)
(1)
Figures 1 and 2
(4)
(4)
(4)
GND to 3.0V
(5)
t
3ns Max.
PU
1.5V
1.5V
AOE
, t
4849 tbl 11
50%
t
ACE
RC
, t
AA
t
BDD
or t
6
BDD
DATA
(3,4)
.
BUSY
Figure 1. AC Output Load
OUT
INT
435Ω
VALID DATA
t
PD
Industrial and Commercial Temperature Ranges
50%
3.3V
4849 drw 03
(4)
590Ω
30pF
4849 drw 06
t
DATA
HZ
.
(2)
t
OH
Figure 2. Output Test Load
OUT
* Including scope and jig.
(for t
435Ω
LZ
, t
HZ
, t
WZ
, t
4849 drw 05
3.3V
OW
4849 drw 04
)
590Ω
5pF*