UDA1380HN NXP Semiconductors, UDA1380HN Datasheet - Page 27

• Manufacturer Part Number: UDA1380HN
• Manufacturer: NXP Semiconductors

Specifications of UDA1380HN

• Lead Free Status / Rohs Status: Compliant

10.2
Table 13 shows the I
addresses are one byte each, the setting data is always a pair of two bytes.
The format of the WRITE cycle is as follows:
1. The microcontroller begins by asserting a start condition (S).
2. The first byte (8 bits) contains the device address ‘00110A
3. The UDA1380 asserts an acknowledge (A).
4. The microcontroller writes the 8-bit address (ADDR) of the UDA1380 register to which the data will be written.
5. The UDA1380 acknowledges this register address (A).
6. The microcontroller sends two bytes of data with the Most Significant (MS) byte first, followed by the Least Significant (LS) byte; after each byte the
7. After each pair of bytes transmitted, the register address is auto-incremented; after each byte the UDA1380 asserts an acknowledge (A).
8. The UDA1380 frees the I
Table 13 Master transmitter writes to UDA1380 registers in the I
STAR
T
S
UDA1380 asserts an acknowledge (A).
WRITE cycle
INITIAL BYTE
ADDRESS
00110A
DEVICE
1
2
0
C-bus configuration for a WRITE cycle. The WRITE cycle is used to write the data to the internal registers. The device and register
R/W
0
2
C-bus allowing the microcontroller to generate a stop condition (P).
A
REGISTER
ADDRESS
ADDR
A
MS data
byte
auto increment if repeated n groups of 2 bytes are transmitted
MS1
1
0’ and the R/W bit is set to logic 0 (WRITE).
2
C-bus mode
ACKNOWLEDGE FROM UDA1380
A
LS data
byte
LS1
A
...
A
...
A
MSn
A
LSn
A
STOP
P