71V3578S133BG IDT, Integrated Device Technology Inc, 71V3578S133BG Datasheet - Page 9

• Manufacturer Part Number: 71V3578S133BG
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 71V3578S133BG

• Density: 4.5Mb
• Access Time (max): 4.2ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 133MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 18b
• Package Type: BGA
• Operating Temp Range: 0C to 70C
• Number Of Ports: 1
• Supply Current: 250mA
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 119
• Word Size: 18b
• Number Of Words: 256K
• Lead Free Status / Rohs Status: Not Compliant

NOTE:
1. The LBO pin will be internally pulled to V
NOTES:
1. All values are maximum guaranteed values.
2. At f = f
3. For I/Os V
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Timing Reference Levels
AC Test Load
IDT71V3576, IDT71V3578, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with
3.3V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect
Symbol
Symbol
I
I
I
SB1
SB2
I
DD
|I
V
V
ZZ
|I
|I
LZZ
LO
OL
OH
LI
|
|
|
MAX,
Operating Power Supply
Current
CMOS Standby Power
Supply Current
Clock Running Power
Supply Current
Full Sleep Mode Supply
Current
HD
inputs are cycling at the maximum frequency of read cycles of 1/t
Input Leakage Current
Output Leakage Current
Output Low Voltage
Output High Voltage
ZZ and LBO Input Leakage Current
= V
DDQ
Parameter
- 0.2V, V
LD
= 0.2V. For other inputs V
Parameter
DD
if it is not actively driven in the application and the ZZ pin will be internally pulled to V
Device Selected, Outputs Open, V
Device Deselected, Outputs Open, V
Device Deselected, Outputs Open, V
V
V
V
ZZ > V
DDQ
DDQ
DDQ
(1)
= Max., V
= Max., V
= Max., V
HD,
See Figure 1
V
0 to 3V
DD
1.5V
1.5V
2ns
HD
= Max.
IN
IN
IN
= V
Test Conditions
> V
> V
> V
DD
IH
HD
HD
5279 tbl 10
I
I
V
V
V
OL
OH
- 0.2V, V
or < V
DD
DD
OUT
or < V
or < V
= +8mA, V
= -8mA, V
= Max., V
= Max., V
= 0V to V
6.42
IL
LD
LD
CYC
9
, f = f
LD
, f = 0
, f = f
(Typical, ns)
while ADSC = LOW; f=0 means no input lines are changing.
DD
DD
= 0.2V.
DD
IN
IN
MAX
DDQ
DD
DD
= 0V to V
= 0V to V
MAX
= Min.
= Max.,
= Min.
(2,3)
= Max.,
= Max.,
, Device Deselected
(2)
tCD
Test Conditions
(2,3)
Figure 2. Lumped Capacitive Load, Typical Derating
DD
DD
6
5
4
3
2
1
Commercial and Industrial Temperature Ranges
20 30 50
Com'l
295
105
30
30
I/O
150MHz
Capacitance (pF)
305
Ind
115
35
35
80
Figure 1. AC Test Load
100
Z
0
Com'l
= 50
250
100
SS
Min.
30
30
2.4
___
___
___
___
if not actively driven.
133MHz
50
Max.
260
Ind
110
0.4
35
35
30
___
5
5
V
DDQ
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200
Unit
Unit
µ A
µ A
µ A
mA
mA
mA
mA
V
V
,
,