83940DYLF IDT, Integrated Device Technology Inc, 83940DYLF Datasheet
83940DYLF
Specifications of 83940DYLF
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83940DYLF Summary of contents
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G D ENERAL ESCRIPTION The ICS83940D is a low skew, 1-to-18 LVPECL-to- LVCMOS/LVTTL Fanout Buffer. The ICS83940D has two selectable clock inputs. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels. The LVCMOS_CLK can accept LVCMOS or ...
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ABLE IN ESCRIPTIONS ...
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BSOLUTE AXIMUM ATINGS Supply Voltage Inputs Outputs Input Current Storage Temperature, T STG 83940DY LVPECL- -LVCMOS / LVTTL F TO 3.6V NOTE: Stresses beyond those listed under Absolute Maximum ...
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T 4A ABLE HARACTERISTICS ...
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T 4B ABLE HARACTERISTICS ...
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T 4C ABLE HARACTERISTICS ...
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The spectral purity in a band at a specific offset from the funda- mental compared to the power of the fundamental is called the dBc Phase Noise. This value is normally expressed using a Phase noise plot and is most ...
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P ARAMETER 1.65V±5% V DD, V DDO LVCMOS GND -1.65V±5% 3.3V C /3. ORE UTPUT OAD 1.25V±5% V DD, V DDO LVCMOS GND -1.25V±5% 2. UTPUT OAD EST IRCUIT PART 1 ...
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V DD LVCMOS_CLK 2 nPCLK PCLK V DDO 2 Q0:Q17 ROPAGATION ELAY 1.8V 0.5V Clock Outputs UTPUT ISE ALL IME 83940DY LVPECL- -LVCMOS / LVTTL F TO 2.4V 0.5V ...
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IRING THE IFFERENTIAL NPUT TO Figure 1 shows how the differential input can be wired to accept single ended levels. The reference voltage V_REF = V generated by the bias resistors R1, R2 and C1. This bias ...
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LVPECL LOCK NPUT NTERFACE The PCLK /nPCLK accepts LVPECL, CML, SSTL and other differential signals. Both V and V SWING and V input requirements. Figures show interface CMR examples for the PCLK/nPCLK input driven ...
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ABLE VS IR LOW ABLE FOR JA Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered boards. The data in the second row ...
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ACKAGE UTLINE UFFIX FOR ABLE ACKAGE ...
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ABLE RDERING NFORMATION ...
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• • " ≤ 2 ...
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We’ve Got Your Timing Solution. 6024 Silver Creek Valley Road San Jose, CA 95138 © 2010 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, the IDT logo, ICS and HiPerClockS are trademarks of ...