ICS85352AYI IDT, Integrated Device Technology Inc, ICS85352AYI Datasheet
ICS85352AYI
Specifications of ICS85352AYI
Available stocks
Related parts for ICS85352AYI
ICS85352AYI Summary of contents
Page 1
... Pulldown CLK0 Pullup/Pulldown nCLK0 Pulldown CLK1 Pullup/Pulldown nCLK1 ICS85352AYI REVISION B JULY 6, 2010 Features • Twelve, 2-to-1 multiplexers with LVPECL outputs • Selectable differential CLKx, nCLKx input pairs • CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • ...
Page 2
... Input Pulldown Resistor PULLDOWN Function Table Table 3. Control Input Function Table SELx Selected Clock inputs 0 CLK0, nCLK0 1 CLK1, nCLK1 ICS85352AYI REVISION B JULY 6, 2010 Type Description Output Differential output pairs. LVPECL interface levels. Power Output power supply pins. Power Negative power supply pins. Power Positive power supply pins ...
Page 3
... V Peak-to-Peak Input Voltage; NOTE Common Mode Input Voltage; NOTE 1, 2 CMR NOTE 1: V should not be less than -0.3V. IL NOTE 2: Common mode input voltage is defined as V ICS85352AYI REVISION B JULY 6, 2010 Rating 4.6V -0. 0.5V CC 50mA 100mA 27.6°C/W (0 lfpm) -65°C to 150°C = 3.3V ± 5 2.5V to 3.3V ± ...
Page 4
... NOTE 4: Defined as skew between outputs on different devices operating at the same supply voltage, same temperature and with equal load conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points. ICS85352AYI REVISION B JULY 6, 2010 = 3.3V ± 5 2.5V to 3.3V ±5%, V ...
Page 5
... Core/ 3.3V LVPECL Output Load AC Test Circuit V CC nCLK[0:1] V Cross Points PP CLK[0: Differential Input Level nQx Qx nQy Qy tsk(o) Output Skew ICS85352AYI REVISION B JULY 6, 2010 2.8V±0.04V V CC SCOPE Qx LVPECL nQx 3.3V Core/ 2.5V LVPECL Output Load AC Test Circuit Par t 1 nQx Qx V Par t 2 CMR nQy Qy ...
Page 6
... CLK/nCLK Inputs For applications not requiring the use of the differential input, both CLK and nCLK can be left floating. Though not required, but for additional protection, a 1kΩ resistor can be tied from CLK to ground. ICS85352AYI REVISION B JULY 6, 2010 nQ[0:11] Q[0:11] x 100% Output Rise/Fall Time ...
Page 7
... This can be done in one of two ways. First, R3 and R4 in parallel should equal the transmission Figure 1. Recommended Schematic for Wiring a Differential Input to Accept Single-ended Levels ICS85352AYI REVISION B JULY 6, 2010 line impedance. For most 50Ω applications, R3 and R4 can be 100Ω ...
Page 8
... SOLDER PIN PAD Figure 2. Assembly for Exposed Pad Thermal Release Path - Side View (drawing not to scale) ICS85352AYI REVISION B JULY 6, 2010 and dependent upon the package power dissipation as well as electrical conductivity requirements. Thus, thermal and electrical analysis and/or testing are recommended to determine the minimum number needed ...
Page 9
... HCSL R1 50Ω *Optional – R3 and R4 can be 0Ω Figure 3E. CLK/nCLK Input Driven by a 3.3V HCSL Driver ICS85352AYI REVISION B JULY 6, 2010 with the vendor of the driver component to confirm the driver must meet the V and termination requirements. For example in Figure 3A, the input OH PP termination applies for IDT LVHSTL drivers ...
Page 10
... Figure 4A. 3.3V LVPECL Output Termination ICS85352AYI REVISION B JULY 6, 2010 transmission lines. Matched impedance techniques should be used to maximize operating frequency and minimize signal distortion. Figures 4A and 4B show two different layouts which are recommended only as guidelines. Other suitable clock layouts may ...
Page 11
... Figure 5A. 2.5V LVPECL Driver Termination Example V = 2.5V CC 50Ω 50Ω 2.5V LVPECL Driver Figure 5C. 2.5V LVPECL Driver Termination Example ICS85352AYI REVISION B JULY 6, 2010 level. The R3 in Figure 5B can be eliminated and the termination is shown in Figure 5C. – very close to ground 2.5V 2.5V R3 250Ω ...
Page 12
... C3 C4 .1uF .1uF 10uf Figure 6. ICS85352I Application Schematic ICS85352AYI REVISION B JULY 6, 2010 the LVPECL output drivers, only two terminations examples are = 3.3V. The decoupling shown in this schematic. Additional termination approaches can be CC found in the LVPECL Termination Application Note. Vcc = Vcco = 3.3V ...
Page 13
... This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of board (multi-layer). θ Table 6. Thermal Resistance JA Linear Feet per Minute Multi-Layer PCB, JEDEC Standard Test Boards ICS85352AYI REVISION B JULY 6, 2010 = 3. 3.465V, which gives worst case results 3.465V * 170mA = 589.05mW EE_MAX * Pd_total + T ...
Page 14
... OH_MAX CCO_MAX [(2V – 0.9V)/50Ω] * 0.9V = 19.8mW Pd_L = [(V – (V – 2V))/R OL_MAX CCO_MAX [(2V – 1.7V)/50Ω] * 1.7V = 10.2mW Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW ICS85352AYI REVISION B JULY 6, 2010 V OUT RL 50Ω CCO = V – 0.9V CCO_MAX = V – ...
Page 15
... Air Flow Table for a 48 Lead TQFP, E-Pad JA Linear Feet per Minute Multi-Layer PCB, JEDEC Standard Test Boards Transistor Count The transistor count for ICS85352I is: 2252 ICS85352AYI REVISION B JULY 6, 2010 12 BIT, 2-TO-1, 3.3V, 2.5V LVPECL CLOCK BUFFER θ vs. Air Flow JA 0 200 27.6° ...
Page 16
... Ref. D3 & E3 3.0 e 0.50 Basic L 0.45 0.60 θ 0° ccc Reference Document: JEDEC Publication 95, MS-026 ICS85352AYI REVISION B JULY 6, 2010 -HD VERSION EXPOSED PAD DOWN 0.20 TAB -TAB, EXPOSED PART OF CONNECTION BAR OR TIE BAR Maximum 1.20 0.15 1.05 0.27 0.20 4.0 0.75 7° ...
Page 17
... Any other applications, such as those requiring high reliability or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. ICS85352AYI REVISION B JULY 6, 2010 Package 48 Lead TQFP, E-Pad ...
Page 18
... Ordering Information Table - deleted “ICS” prefix from Part/Order Number B 16 Updated Package Outline. b Corrected title of datasheet from clock generator to clock buffer. ICS85352AYI REVISION B JULY 6, 2010 12 BIT, 2-TO-1, 3.3V, 2.5V LVPECL CLOCK BUFFER 18 ©2010 Integrated Device Technology, Inc. Date 7/6/06 9/27/06 ...
Page 19
ICS85352I Data Sheet We’ve Got Your Timing Solution 6024 Silver Creek Valley Road Sales 800-345-7015 (inside USA) San Jose, California 95138 +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to ...