AM29LV033C-90EI Spansion Inc., AM29LV033C-90EI Datasheet - Page 5

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AM29LV033C-90EI

Manufacturer Part Number
AM29LV033C-90EI
Description
Manufacturer
Spansion Inc.
Datasheet

Specifications of AM29LV033C-90EI

Cell Type
NOR
Density
32Mb
Access Time (max)
90ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
22b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
4M
Supply Current
16mA
Mounting
Surface Mount
Pin Count
40
Lead Free Status / Rohs Status
Not Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
AM29LV033C-90EI
Manufacturer:
AMD
Quantity:
1 000
Part Number:
AM29LV033C-90EI
Manufacturer:
AMD
Quantity:
20 000
TABLE OF CONTENTS
General Description . . . . . . . . . . . . . . . . . . . . . . . . 4
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 6
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 7
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Ordering Information . . . . . . . . . . . . . . . . . . . . . . 10
22268B5 September 12, 2006
Continuity of Specifications .................................... 1
For More Information .............................................. 1
Standard Products ................................................ 10
Requirements for Reading Array Data ................. 11
Writing Commands/Command Sequences .......... 11
Accelerated Program Operation ........................... 12
Program and Erase Operation Status .................. 12
Standby Mode ...................................................... 12
Automatic Sleep Mode ......................................... 12
RESET#: Hardware Reset Pin ............................. 12
Output Disable Mode ............................................ 13
Autoselect Mode ................................................... 15
Sector/Sector Block Protection and Unprotection 15
Hardware Data Protection .................................... 18
Low V
Write Pulse “Glitch” Protection ............................. 18
Logical Inhibit ....................................................... 18
Power-Up Write Inhibit ......................................... 18
Reading Array Data .............................................. 21
Reset Command .................................................. 21
Autoselect Command Sequence .......................... 21
Byte Program Command Sequence ..................... 21
Unlock Bypass Command Sequence ................... 22
Accelerated Program Operations ......................... 22
Chip Erase Command Sequence ......................... 22
Sector Erase Command Sequence ...................... 23
Erase Suspend/Erase Resume Commands ......... 23
Table 1. Am29LV033C Device Bus Operations ..........11
Table 2. Am29LV033C Sector Address Table ............13
Table 3. Am29LV033C Autoselect Codes
(High Voltage Method) ................................................15
Table 4. Sector Block Addresses for
Protection/Unprotection ...............................................16
Figure 1. Temporary Sector Unprotect Operation....... 16
Figure 2. In-System Sector Protect/
Unprotect Algorithms................................................... 17
Table 5. CFI Query Identification String ......................18
Table 6. System Interface String .................................19
Table 7. Device Geometry Definition ..........................19
Table 8. Primary Vendor-Specific Extended Query ....20
Figure 3. Program Operation ...................................... 22
Figure 4. Erase Operation........................................... 24
Table 9. Am29LV033C Command Definitions ...........25
CC
Write Inhibit ............................................ 18
D A T A
Am29LV033C
S H E E T
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 31
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 33
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 34
Erase and Programming Performance . . . . . . . 44
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 45
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 48
DQ7: Data# Polling ............................................... 26
RY/BY#: Ready/Busy# ......................................... 27
DQ6: Toggle Bit I .................................................. 27
DQ2: Toggle Bit II ................................................. 27
Reading Toggle Bits DQ6/DQ2 ............................ 27
DQ5: Exceeded Timing Limits .............................. 28
DQ3: Sector Erase Timer ..................................... 28
CMOS Compatible ............................................... 31
Zero Power Flash ................................................. 32
Read Operations .................................................. 34
Hardware Reset (RESET#) .................................. 35
Erase/Program Operations ................................... 36
TS 040—40-Pin Standard TSOP ......................... 45
TSR040—40-Pin Reverse TSOP ........................ 46
FBD063—63-Ball Fine-Pitch Ball Grid Array
(FBGA) 8 x 14 mm ............................................... 47
Figure 5. Data# Polling Algorithm................................ 26
Figure 6. Toggle Bit Algorithm..................................... 28
Table 10. Write Operation Status ................................29
Figure 9. I
and Automatic Sleep Currents) ................................... 32
Figure 10. Typical I
Figure 11. Test Setup.................................................. 33
Table 11. Test Specifications ......................................33
Figure 12. Input Waveforms and
Measurement Levels ................................................... 33
Figure 13. Read Operations Timings .......................... 34
Figure 14. RESET# Timings........................................ 35
Figure 15. Program Operation Timings ....................... 37
Figure 16. Accelerated Program Timing Diagram ....... 37
Figure 17. Chip/Sector Erase Operation Timings........ 38
Figure 18. Data# Polling Timings (During
Embedded Algorithms)................................................ 39
Figure 19. Toggle Bit Timings (During
Embedded Algorithms)................................................ 39
Figure 20. DQ2 vs. DQ6.............................................. 39
Figure 21. Temporary Sector/Sector
Block Unprotect Timing Diagram................................. 40
Figure 22. Sector Protect/Unprotect
Timing Diagram ........................................................... 41
Figure 23. Alternate CE# Controlled Write
Operation Timings ....................................................... 43
CC1
Current vs. Time (Showing Active
CC1
vs. Frequency ......................... 32
3

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