AM29LV033C-90EI Spansion Inc., AM29LV033C-90EI Datasheet - Page 22

• Manufacturer Part Number: AM29LV033C-90EI
• Manufacturer: Spansion Inc.

Specifications of AM29LV033C-90EI

• Cell Type: NOR
• Density: 32Mb
• Access Time (max): 90ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 22b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 4M
• Supply Current: 16mA
• Mounting: Surface Mount
• Pin Count: 40
• Lead Free Status / Rohs Status: Not Compliant

Any commands written to the device during the Em-
bedded Program Algorithm are ignored. Note that a
hardware reset immediately terminates the program-
ming operation. The Byte Program command se-
quence should be reinitiated once the device has reset
to reading array data, to ensure data integrity.
Programming is allowed in any sequence and across
sector boundaries. A bit cannot be programmed
from a “0” back to a “1”. Attempting to do so may
halt the operation and set DQ5 to “1,” or cause the
Data# Polling algorithm to indicate the operation was
successful. However, a succeeding read shows that
the data is still “0”. Only erase operations can convert
a “0” to a “1”.
Unlock Bypass Command Sequence
The unlock bypass feature allows the system to pro-
gram bytes to the device faster than using the stan-
dard program command sequence. The unlock bypass
command sequence is initiated by first writing two un-
lock cycles. This is followed by a third write cycle con-
taining the unlock bypass command, 20h. The device
then enters the unlock bypass mode. A two-cycle un-
lock bypass program command sequence is all that is
required to program in this mode. The first cycle in this
sequence contains the unlock bypass program com-
mand, A0h; the second cycle contains the program
address and data. Additional data is programmed in
the same manner. This mode dispenses with the initial
two unlock cycles required in the standard program
command sequence, resulting in faster total program-
ming time.
ments for the command sequence.
During the unlock bypass mode, only the Unlock By-
pass Program and Unlock Bypass Reset commands
are valid. To exit the unlock bypass mode, the system
must issue the two-cycle unlock bypass reset com-
mand sequence. The first cycle must contain the data
90h; the second cycle the data 00h. Addresses are
don’t cares for both cycles. The device then returns to
reading array data.
Accelerated Program Operations
The device offers accelerated program operations
through the ACC pin. When the system asserts V
the ACC pin, the device automatically enters the Un-
lock Bypass mode. The system may then write the
two-cycle Unlock Bypass program command se-
quence, eliminating two cycles from the command se-
quence. In addition, the device uses the higher voltage
on the ACC pin to accelerate the operation. Note that
the ACC pin must not be at V
operations, or device damage may result. If ACC is to
be permanently set, it is recommended that it be tied
to V
20
CC
to minimize current consumption.
Table 9, on page 25
HH
during read or erase
shows the require-
D A T A
HH
Am29LV033C
on
S H E E T
Figure 3
ation. See the
page 36
and to
Note: See
quence.
Chip Erase Command Sequence
Chip erase is a six bus cycle operation. The chip erase
command sequence is initiated by writing two unlock
cycles, followed by a set-up command. Two additional
unlock write cycles are then followed by the chip erase
command, which in turn invokes the Embedded Erase
algorithm. The device does not require the system to
preprogram prior to erase. The Embedded Erase algo-
rithm automatically preprograms and verifies the entire
memory for an all zero data pattern prior to electrical
erase. The system is not required to provide any con-
trols or timings during these operations.
page 25
the chip erase command sequence.
Increment Address
Figure 15, on page 37
shows the address and data requirements for
illustrates the algorithm for the program oper-
table in “AC Characteristics” for parameters,
Table 9, on page 25
Figure 3. Program Operation
in progress
Embedded
algorithm
Program
“Erase/Program Operations” on
22268B5 September 12, 2006
No
for program command se-
Command Sequence
for timing diagrams.
Write Program
Last Address?
Programming
from System
Verify Data?
Completed
Data Poll
START
Yes
Yes
Table 9, on
No