LRS1331C Sharp Electronics, LRS1331C Datasheet - Page 33

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LRS1331C

Manufacturer Part Number
LRS1331C
Description
Manufacturer
Sharp Electronics
Datasheet

Specifications of LRS1331C

Lead Free Status / Rohs Status
Not Compliant
17. Design Considerations
18. Related Document Information
1. Power Supply Decoupling
2. F-V
3. The Inhibition of Overwrite Operation
4. Power Supply
Note:
1.International customers should contact their local SHARP or distribution sales offices.
To avoid a bad effect to the system by flash memory power switching characteristics, each device should have a
0.1µF ceramic capacitor connected between its F-V
inductance capacitors should be placed as close as possible to package leads.
Updating the memory contents of flash memories that reside in the target system requires that the printed
circuit board designer pay attention to the F-V
considerations given to the F-V
Please do not execute reprogramming “0” for the bit which has already been programed “0”. Overwrite
operation may generate unerasable bit.
In case of reprogramming “0” to the data which has been programed “1”.
• Program “0” for the bit in which you want to change data from “1” to “0”.
• Program “1” for the bit which has already been programmed “0”.
For example, changing data from “1011110110111101” to “1010110110111100” requires “1110111111111110”
programming.
Block erase, full chip erase, word write and lock-bit configuration with an invalid F-V
trical Characteristics) produce spurious results and should not be attempted.
Device operations at invalid F-V
results and should not be attempted.
CCW
Trace on Printed Circuit Boards
Document No.
FUM99902
(1)
CC
CC
power bus.
LH28F800BJ, LH28F160BJ, LH28F320BJ Series Appendix
voltage (See Chapter 11.DC Electrical Characteristics) produce spurious
L R S 1 3 3 1 C
CCW
Power Supply trace. Use similar trace widths and layout
CC
and GND and between its F-V
Document Name
CCW
CCW
(See 11. DC Elec-
and GND. Low
Rev. 1.00
31

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