LRS1331C Sharp Electronics, LRS1331C Datasheet - Page 17

• Manufacturer Part Number: LRS1331C
• Manufacturer: Sharp Electronics

Specifications of LRS1331C

• Lead Free Status / Rohs Status: Not Compliant

12.3 Write Cycle (F-WE Controlled)
Notes:
1. Read timing characteristics during block erase, full chip erase, word write and lock-bit configurations are the same as during
2. Sampled, not 100% tested.
3. Refer to Section 5. Command Definitions for Flash Memory for valid A
4. F-V
5. It is written when F-CE and F-WE are active. The address and data needed to execute a command are latched on the rising
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
WHWL
t
WLWH
DVWH
WHDX
WHAX
SHWH
VPWH
AVWH
WHEH
WHRL
WHGL
PHWL
QVVL
ELWL
AVAV
QVSL
read-only operations. Refer to AC Characteristics for read cycle.
write or lock-bit configuration.
cess (SR.1/3/4/5
edge of F-WE or F-CE (Whichever goes high first).
CC
should be held at V
Write Cycle Time
F-RP High Recovery to F-WE Going Low
F-CE Setup to F-WE Going Low
F-WE Pulse Width
F-WP V
F-V
Address Setup to F-WE Going High
Data Setup to F-WE Going High
Data Hold from F-WE High
Address Hold from F-WE High
F-CE Hold from F-WE High
F-WE Pulse Width High
F-WE going High to F-RY/BY Going Low
Write Recovery before Read
F-V
F-WP V
CCW
CCW
IH
IH
Setup to F-WE Going High
Hold from Valid SRD, F-RY/BY High-Z
0).
Setup to F-WE Going High
Hold from Valid SRD, F-RY/BY High-Z
CCWH
(1,5)
until determination of block erase, full chip erase, word write or lock-bit configuration suc-
Parameter
L R S 1 3 3 1 C
IN
and D
(T
Notes
A
2,4
2,4
2
2
2
3
3
IN
= -25°C to +85°C, V
for block erase, full chip erase, word
Min.
100
100
90
10
50
50
50
10
30
1
0
0
0
0
0
Max.
100
CC
= 2.7V to 3.3V)
Unit
Rev. 1.00
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
15