DT28F800F3B95 Intel, DT28F800F3B95 Datasheet - Page 16

• Manufacturer Part Number: DT28F800F3B95
• Manufacturer: Intel

Specifications of DT28F800F3B95

• Density: 8Mb
• Access Time (max): 95ns
• Interface Type: Parallel
• Boot Type: Bottom
• Address Bus: 19b
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: SSOP
• Sync/async: Async/Sync
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 16b
• Number Of Words: 512K
• Supply Current: 60mA
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / Rohs Status: Not Compliant

28F800F3—Automotive
4.1
4.2
4.3
10
Table 4.
Read Array Command
Upon initial device power-up or exit from reset, the device defaults to read array mode. The read
configuration register defaults to asynchronous page mode. The Read Array command also causes
the device to enter read array mode. The device remains enabled for reads until another command
is written. Once the internal WSM has started a block erase or program, the device will not
recognize the Read Array command until the WSM completes its operation or unless the WSM is
suspended via an Erase or Program Suspend command. The Read Array command functions
independently of the V
Read Identifier Codes Command
The identifier code operation is initiated by writing the Read Identifier Codes command. After
writing the command, read cycles retrieve the manufacturer and device codes (see
identifier code values). Page mode and burst reads are not supported in this read mode. To
terminate the operation, write another valid command, like the Read Array command. The Read
Identifier Codes command functions independently of the V
Identifier Codes
NOTE: 1. Read Configuration Register = RCD.
Read Status Register Command
The status register can be read at any time by writing the Read Status Register command to the
CUI. After writing this command, all subsequent read operations output status register data until
another valid command is written. Page mode and burst reads are not supported in this read mode.
The status register content is updated and latched on the rising edge of ADV# or rising (falling)
4. SRD = Data read from status register. See
5. Following the Read Identifier Codes command, read operations access manufacturer, device codes, and
6. Following a block erase, program, and suspend operation, read operations access the status register.
7. To issue a block erase, program, or suspend operation to a lockable block, hold WP# at V
8. Either 40H or 10H are recognized by the WSM as the program setup.
Manufacturer Code
Device Code
Read Configuration Register
of the status register bits.
WD = Data to be written at location WA. Data is latched on the rising edge of WE# or CE# (whichever goes
high first).
ID = Data read from identifier codes. See
RCD = Data to be written to read configuration register. See
on page 14
read configuration register.
for a description of the read configuration register bits.
Code
8 Mbit
PP
voltage.
-T
-B
Address
00000
00001
00001
00005
(Hex)
Table 4
Table 5, “Status Register Definition” on page 12
for manufacturer and device codes.
RCD
(Hex)
0089
88F1
88F2
Data
(1)
Table 6, “Read Configuration Register Definition”
PP
voltage.
PRELIMINARY
IH
Table 4
for a description
.
for