AT24C128C-SSHM-T Atmel, AT24C128C-SSHM-T Datasheet - Page 7

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AT24C128C-SSHM-T

Manufacturer Part Number
AT24C128C-SSHM-T
Description
Manufacturer
Atmel
Datasheet

Specifications of AT24C128C-SSHM-T

Lead Free Status / Rohs Status
Compliant

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8734A–SEEPR–1/11
Figure 4-3.
Figure 4-4.
Figure 4-5.
Note:
SDA
SDA
SDA OUT
SCL
SCL
SDA IN
SCL
1. The write cycle time, t
WORDn
Software Reset
Bus Timing
Write Cycle Timing
Start bit
t
SU.STA
8
th
BIT
1
WR
, is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle
t
HD.STA
ACK
t
t
F
2
LOW
t
AA
CONDITION
Dummy Clock Cycles
t
HIGH
STOP
3
t
HD.DAT
t
LOW
t
wr
8
(1)
t
t
SU.DAT
DH
9
CONDITION
START
Start bit
Atmel AT24C128C
t
R
t
SU.STO
Stop bit
t
BUF
7

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