NOIL2SM1300A-GWC ON Semiconductor, NOIL2SM1300A-GWC Datasheet - Page 15

• Manufacturer Part Number: NOIL2SM1300A-GWC
• Manufacturer: ON Semiconductor

Specifications of NOIL2SM1300A-GWC

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Detailed Description of Internal Registers
is, when seqmode1[0] is ‘0’. Uploaded registers have an
immediate effect on how the frame is read out. Parameters
uploaded during readout may have an undesired effect on the
data coming out of the images.
MBS Block
debugging. All registers in this block must remain
unchanged after startup.
LVDS Clock Divider Block
LVDS transmitters or receivers. This block also enables
shutting down one or all LVDS channels. For normal
operation, this register block must remain untouched after
startup.
Table 9. INTERNAL REGISTERS
The registers must be changed only during idle mode, that
The register block contains registers for sensor testing and
This block controls division of the input clock for the
Block
tint_ds_timer1
tint_ds_timer2
tint_ts_timer1
tint_ts_timer2
tint_black_timer
rot_timer
fot_timer
fot_timer
prechpix_timer
prechpix_timer
prechcol_timer
rowselect_timer
sample_timer
sample_timer
vmem_timer
vmem_timer
delayed_rdt_tim
er
delayed_rdt_tim
er
Fix29
Fix30
Fix31
Fix32
Fix33
Fix34
Register Name
Address [6..0]
100
101
102
103
104
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
Field
[7:0]
[1:0]
[7:0]
[1:0]
[7:0]
[7:0]
[7:0]
[1:0]
[7:0]
[1:0]
[7:0]
[7:0]
[7:0]
[1:0]
[7:0]
[1:0]
[7:0]
[7:0]
[0]
[0]
[0]
[0]
[0]
[0]
http://onsemi.com
0x40
0x00
0x0C
0x00
0x06
0x09
0x3B
0x01
0x7C
0x00
0x03
0x06
0xF8
0x00
0x10
0x01
0
0
0
0
0
0
0
0
Reset Value
15
AFE Block
channels or the complete AFE block. This block also
contains the register for setting the PGA gain:
AFE_mode[5:3]. Refer to Absolute Maximum Ratings on
page 3 for more details on the PGA settings.
Biasing Block
currents for the sensor. Default values after startup must
remain unchanged for normal operation of the sensor.
Image Core Block
array itself. Default settings after startup must remain
unchanged for normal operation of the image sensor.
This register block contains registers to shut down ADC
This block contains several registers for setting biasing
The registers in this block have an impact on the pixel
Length of DS integration time (granularity selectable)
Length of DS integration time (granularity selectable)
Length of TS integration time (granularity selectable)
Length of TS integration time (granularity selectable)
Reserved, fixed value
Length of ROT (granularity clock cycles)
Length of FOT (granularity clock cycles)
Length of FOT (granularity clock cycles)
Length of pixel precharge (granularity clock cycles)
Length of pixel precharge (granularity clock cycles)
Length of column precharge (granularity clock cycles)
Length of rowselect (granularity clock cycles)
Length of pixel_sample (granularity clock cycles)
Length of pixel_sample (granularity clock cycles)
Length of pixel_vmem (granularity clock cycles)
Length of pixel_vmem (granularity clock cycles)
Readout delay for testing purposes (granularity selectable)
Readout delay for testing purposes (granularity selectable)
Reserved, fixed value
Reserved, fixed value
Reserved, fixed value
Reserved, fixed value
Reserved, fixed value
Reserved, fixed value
Description