NOIL2SM1300A-GWC ON Semiconductor, NOIL2SM1300A-GWC Datasheet - Page 12

• Manufacturer Part Number: NOIL2SM1300A-GWC
• Manufacturer: ON Semiconductor

Specifications of NOIL2SM1300A-GWC

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Table 9. INTERNAL REGISTERS
AFE
Bias block
Image
Core
Data Block
Block
afepwd2
bandgap
imcmodes
Fix7
Fix8
imcbias1
imcbias2
imcbias3
Imcbias4
Fix9
Fix10
dataconfig1
dataconfig2
Fix11
dacvrefadc
Fix12
Fix13
Fix14
datachannel0_1
Register Name
Address [6..0]
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Field
[3:0]
[5:3]
[7:0]
[7:0]
[3:0]
[7:4]
[3:0]
[7:4]
[3:0]
[7:4]
[3:0]
[7:4]
[7:0]
[7:0]
[1:0]
[7:6]
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
[5:4]
[0]
[1]
[2]
[0]
[1]
[2]
[3]
[4]
[5]
[2]
[3]
[4]
[5]
[0]
[1]
[2]
[3]
http://onsemi.com
0x00
‘0’
‘1’
‘0’
‘000’
0
‘1’
‘1’
0
‘1’
‘0’
0x00
0x00
‘1000’
‘1000’
‘1000’
‘1000’
‘1000’
‘1000’
‘1000’
‘1000’
0x20
0xC0
0x00
1
0
0
0
0x03
0x2A
0
0x84
0x80
0
0
0
0
0x00
Reset Value
12
Power down adc_channel_2x 11 to 8
Power down bandgap and currents
External resistor
External voltage reference
Bandgap trimming
Power down
Enable vrefcol regulator
Enable precharge regulator
Disable internal bias for vprech
Disable column load
clkmain invert
Reserved, fixed value
Reserved, fixed value
Bias colfpn DAC buffer
Bias precharge regulator
Bias pixel precharge level
Bias column ota
Bias column unip fast
Bias column unip slow
Bias column load
Bias column precharge
Reserved, fixed value
Reserved, fixed value
Reserved, fixed value
‘1’: Enables user upload of dacvrefadc register value
‘0’: Keeps default value
Enable PRBS generation
Reserved, fixed value
Reserved, fixed value
Training pattern inserted to sync LVDS receivers
Training pattern inserted to sync LVDS receivers
Reserved, fixed value
Input to DAC to set the offset at the input of the ADC
Reserved, fixed value
Reserved, fixed value
Reserved, fixed value
Bypass the data block
Enables the FPN correction
Overwrite incoming ADC data by the data in the testpat
register
Reserved, fixed value
Pattern inserted to generate a test image
Description