NOIL2SM1300A-GWC ON Semiconductor, NOIL2SM1300A-GWC Datasheet - Page 10

• Manufacturer Part Number: NOIL2SM1300A-GWC
• Manufacturer: ON Semiconductor

Specifications of NOIL2SM1300A-GWC

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Analog Front End
Programmable Gain Amplifiers
ADCs.
setting: afemode [5:3].
register.
of the PGA is done by the default afemode<5:3> setting.
Table 7. GAIN SETTINGS
The PGAs amplify the signal before sending it to the
The amplification inside the PGA is controlled by one SPI
Six gain steps can be selected by the afemode<5:3>
Table 7 lists the six gain settings. The unity gain selection
afemode<5:3>
000
001
010
011
100
101
Gain
2.25
1.5
1
2
3
4
Figure 7. Data Block
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Analog to Digital Converter
ADCs nominally operate at 31.5 Msamples/s.
Data Block
end (output stage + ADCs) and the LVDS interface. It muxes
the outputs of two ADCs to one LVDS block and performs
some minor data handling:
•
•
level calibration and FPN correction.
data output channels. One additional channel generates the
synchronization protocol. A high level overview is
illustrated in the following figure.
Table 8. ADC PARAMETERS
Data rate
Quantization
DNL
INL
The sensor has 24 10-bit pipelined ADCs on board. The
The data block is positioned in between the analog front
It also contains a huge part of the functionality for black
A number of data blocks are placed in parallel to serve all
CRC calculation and insertion
Training and test pattern generation
Parameter
31.5 Msamples/s
10 bit
Typ. < 1 DN
Typ. < 1 DN
Specification