NOIL1SC4000A-GDC ON Semiconductor, NOIL1SC4000A-GDC Datasheet - Page 30
![no-image](/images/manufacturer_photos/0/4/495/on_semiconductor_sml.jpg)
NOIL1SC4000A-GDC
Manufacturer Part Number
NOIL1SC4000A-GDC
Description
Manufacturer
ON Semiconductor
Datasheet
1.NOIL1SC4000A-GDC.pdf
(30 pages)
Specifications of NOIL1SC4000A-GDC
Lead Free Status / Rohs Status
Supplier Unconfirmed
Q:
A:
on the photodiode, which decrease as a result of exposure.
The slope is determined by the amount of light at each pixel
(the more light the steeper the slope). When the pixels reach
the saturation level, the analog signal does not change
despite further exposure. Without any double slope, pulse
pixels p3 and p4 reaches saturation before the sample
moment of the analog values, no signal is acquired without
double slope. When double slope is enabled a second reset
pulse is given (blue line) at a certain time before the end of
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
ON Semiconductor and
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
How does the dual (multiple) slope extended dynamic range mode work?
The green lines in Figure 27 are the analog signal
Reset pulse
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
Total integration time
APPENDIX A: FREQUENTLY ASKED QUESTIONS
Double slope reset pulse
Figure 25. Dual Slope Diagram
N. American Technical Support: 800−282−9855 Toll Free
Europe, Middle East and Africa Technical Support:
Japan Customer Focus Center
USA/Canada
Phone: 421 33 790 2910
Phone: 81−3−5773−3850
http://onsemi.com
30
Read out
the integration time. This double slope reset pulse resets the
analog signal of the pixels below this level to the reset level.
After the reset the analog signal starts to decrease with the
same slope as before the double slope reset pulse. If the
double slope reset pulse is placed at the end of the integration
time (90% for instance) the analog signal that reaches the
saturation levels are not saturated anymore (this increases
the optical dynamic range) at read out. Note that pixel
signals above the double slope reset level are not influenced
by this double slope reset pulse (p1 and p2).
p1
p4
p2
p3
Double slope reset time (usually 5-
10% of the total integration time)
Reset level 1
Reset level 2
Saturation level
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NOIL1SM4000A/D