NOIL1SC4000A-GDC ON Semiconductor, NOIL1SC4000A-GDC Datasheet - Page 21
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NOIL1SC4000A-GDC
Manufacturer Part Number
NOIL1SC4000A-GDC
Description
Manufacturer
ON Semiconductor
Datasheet
1.NOIL1SC4000A-GDC.pdf
(30 pages)
Specifications of NOIL1SC4000A-GDC
Lead Free Status / Rohs Status
Supplier Unconfirmed
Table 10. PIN LIST
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
Pad
Q8
R4
R5
R6
R7
K2
Q9
Q10
R8
R9
R10
R11
Q11
R12
Q12
P15
Q14
Q15
R13
R14
R15
P14
Q13
R16
Q16
P16
N14
N15
L16
L15
N16
M16
L14
M15
K14
J14
M14
Pin
sh_col
pre_col
norowsel
clock_y
sync_y
eos_y_r
temp_diode_p
temp_diode_n
vpix
vmem_l
vmem_h
vres
vres_ds
adc1_ref_low
adc1_linear_conv
adc1_bit_9
adc1_bit_8
adc1_bit_7
adc1_bit_6
adc1_bit_5
adc1_bit_4
adc1_bit_3
adc1_bit_2
adc1_bit_1
adc1_bit_0
adc1_clock
adc1_gndd
adc1_vddd
adc1_gnda
adc1_vdda
adc1_bit_inv
adc1_CMD_SS
adc1_nalog_in
adc1_CMD_FS
adc1_ref_high
vres_ds
vres
(Notes 1, 2 and 3)
Pin Name
Input
Input
Input
Input
Input
Testpin
Testpin
Testpin
Supply
Supply
Supply
Supply
Supply
Input
Input
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Supply
Supply
Supply
Supply
Input
Input
Input
Input
Input
Supply
Supply
Pin Type
http://onsemi.com
Digital input. Control signal of the column readout.
Digital input. Control signal of the column readout to reduce row-blanking
time.
Digital input. Control signal of the column readout.
Digital input. Clock of the Y-addressing.
Digital input. Synchronizes the Y-address register.
Indicates when the end of frame is reached when scanning in the ’right’ direc-
tion.
Anode of temperature diode.
Cathode of temperature diode.
Power supply pixel array.
Power supply Vmem drivers.
Power supply Vmem drivers.
Power supply reset drivers.
Power supply reset drivers.
Analog reference input. Low reference voltage of ADC (see Figure 7 on
page 8 for exact resistor value.)
Digital input. 1= linear conversion; 0= gamma correction.
Digital output 1 <9> (MSB).
Digital output 1 <8>.
Digital output 1 <7>.
Digital output 1 <6>.
Digital output 1 <5>.
Digital output 1 <4>.
Digital output 1 <3>.
Digital output 1 <2>.
Digital output 1 <1>.
Digital output 1 <0> (LSB).
ADC clock input.
Digital GND of ADC circuitry.
Digital supply of ADC circuitry (nominal 2.5 V).
Analog GND of ADC circuitry.
Analog supply of ADC circuitry (nominal 2.5 V).
Digital input. 0 = no inversion of output bits; 1 = inversion of output bits.
Analog reference input. Biasing of second stage of ADC. Connect to V
with R = 50 kW and decouple with C = 100 nF to gnda.
Analog input of first ADC.
Analog reference input. Biasing of first stage of ADC. Connect to V
R = 50 kW and decouple with C = 100 nF to gnda.
Analog reference input. High reference voltage of ADC.
See Figure 7 on page 8 for exact resistor value.
Power supply reset drivers.
Power supply reset drivers.
21
Description
DDA
DDA
with