NOIL1SC4000A-GDC ON Semiconductor, NOIL1SC4000A-GDC Datasheet - Page 18

• Manufacturer Part Number: NOIL1SC4000A-GDC
• Manufacturer: ON Semiconductor

Specifications of NOIL1SC4000A-GDC

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Backup Timing (ROT = 100 to 200 ns)
during the selection of a new set of lines. After 100 ns, the
analog data is stored. The ROT is reduced to 100 ns, but as
the internal data is not stable yet, dynamic range is lost. This
is because the complete analog levels are not reached after
100 ns.
100 ns to 200 ns starting at the same time as pre_col and
Precharging the Buses
and hold, except that the prebus1 and prebus2 signals are
activated. Note that precharging of the buses can be
combined with all the timing modes discussed earlier. The
Use a sample and hold function to reduce the ROT.
Track the analog data using Sh_col during the first 100 ns
Figure 20 shows this principle. Sh_col is now a pulse of
This timing mode is similar to the mode without sample
pre_col (short pulse), Norowsel (short pulse) and Sh_col (large pulse)
Figure 21. X and Y Addressing with Precharging of Buses
Figure 20. Reduced Standard ROT with Sh_col Signal
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Norowsel. The duration of Sh_col is equal to the ROT. The
shorter this time the shorter the ROT; however, this also
lowers the dynamic range.
this mode with Sh_col signal and a voltage-averaging signal
must be generated after Sh_col drops and before the readout
starts (see Figure 16 on page 15).
idea is to have a short pulse of about 5 ns to precharge the
output buses to a known level. This mode makes the
ghosting of bad columns impossible. In this mode, Nsf_load
must be made much larger (at least 1 MW).
If voltage-averaging is required, the sensor must work in