ADC104S021EVAL National Semiconductor, ADC104S021EVAL Datasheet - Page 18

• Manufacturer Part Number: ADC104S021EVAL
• Manufacturer: National Semiconductor

Specifications of ADC104S021EVAL

• Lead Free Status / Rohs Status: Not Compliant

www.national.com
put, multiply the fraction of time spent in the normal mode by
the normal mode power consumption and add the fraction of
time spent in shutdown mode multiplied by the shutdown
mode power consumption. Generally, the user will put the part
into normal mode and then put the part back into shutdown
mode. Note that the curve of power consumption vs. through-
put is nearly linear. This is because the power consumption
in the shutdown mode is so small that it can be ignored for all
practical purposes.
7.2 Power Supply Noise Considerations
The charging of any output load capacitance requires current
from the power supply, V
the supply to charge the output capacitance will cause voltage
variations on the supply. If these variations are large enough,
they could degrade SNR and SINAD performance of the ADC.
A
. The current pulses required from
18
Furthermore, discharging the output capacitance when the
digital output goes from a logic high to a logic low will dump
current into the die substrate, which is resistive. Load dis-
charge currents will cause "ground bounce" noise in the sub-
strate that will degrade noise performance if that current is
large enough. The larger is the output capacitance, the more
current flows through the die substrate and the greater is the
noise coupled into the analog channel, degrading noise per-
formance.
To keep noise out of the power supply, keep the output load
capacitance as small as practical. If the load capacitance is
greater than 50 pF, use a 100 Ω series resistor at the ADC
output, located as close to the ADC output pin as practical.
This will limit the charge and discharge current of the output
capacitance and improve noise performance.