3342-5 Peregrine Semiconductor, 3342-5 Datasheet - Page 7

• Manufacturer Part Number: 3342-5
• Description: EVAL KIT FOR PE3342
• Manufacturer: Peregrine Semiconductor
• Series: -r

Specifications of 3342-5

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 3342-05; 3342-50

PE3342
Product Specification
Lock Detect Output
A lock detect signal is provided at pin LD, via the
pin C
of PD_U and PD_D waveforms, driven through a
series 2k ohm resistor. When the loop is locked,
this output will be HIGH with narrow pulses LOW.
Connecting C
provides integration of this signal.
The C
internal inverting comparator with an open drain
output. Thus LD is an “AND” function of PD_U
and PD_D.
Table 8. Serial Interface
Figure 4. Serial Interface Timing Diagram
Document No. 70-0091-04 │ www.psemi.com
EELoad
S_WR
E_WR
S_WR
Clock
0
0
0
Data
EXT
EXT
(see Figure 1). C
signal is sent to the LD pin through an
E_WR
X
0
1
EXT
to an external shunt capacitor
EELoad
0
0
1
t
DSU
EXT
is the logical “NAND”
t
Primary Register
Enhancement Register
EE Register
EC
Register Loaded
t
DHLD
t
ClkH
Serial Data Port
The Serial Data Port allows control data to be
entered into the device. This data can be directed
into one of three registers: the Enhancement
register, the Primary register, and the EE register.
Table 7 defines the control line settings required
to select one of these destinations.
Input data presented on pin 5 (Data) is clocked
serially into the designated register on the rising
edge of Clock. Data is always loaded LSB (B
first into the receiving register. Figure 4 defines
the timing requirements for this process .
©2005-8 Peregrine Semiconductor Corp. All rights reserved.
t
ClkL
t
t
CE
CWR
t
PW
t
WRC
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