3342-5 Peregrine Semiconductor, 3342-5 Datasheet - Page 11

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3342-5

Manufacturer Part Number
3342-5
Description
EVAL KIT FOR PE3342
Manufacturer
Peregrine Semiconductor
Series
-r
Datasheets

Specifications of 3342-5

Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
3342-05
3342-50
PE3342
Product Specification
Gross EEPROM Programming Timing Grid
Figure 7 shows a gross PE3342 EEPROM
programming timing grid although each individual
step has been described thoroughly in previous
sections. It starts with EE Register load, and then
together with other parameters a Vpp_ERASE
negative pulse is applied to Vpp pin to erase the
EEPROM contents and followed by a Vpp_WRITE
pulse for EEPROM write cycle. The separation
Figure 7. Gross PE3342 EEPROM Programming Timing Grid
Document No. 70-0091-04 │ www.psemi.com
Vpp_ERASE
Vpp_WRITE
EELoad
E_WR
S_WR
EESel
Clock
Data
Dout
Note: ENH/ (Pin 20) is at low (0) for this process.
EE Register
0V
3V
3V
3V
0V
3V
0V
3V
0V
3V
0V
3V
0V
12.5V
-8.5V
0V
0V
0V
load
Rough time scale
EE PROM
25 ms
Erase
>=100 ms
CHANNEL
CODE
40 ms
EE PROM
ENH code set's
Dout mux to EE
Write
25 ms
between the Vpp_ERASE and Vpp_WRITE pulse
has to be at least 100 ms if mechanical relays are
used to avoid both being on at the same time.
After EE programming, the contents of the
EEPROM cells can be verified by setting
Enhancement Register Bit 1. A procedure shown
in Figure 8 is applied twice. The first time is to
load the EE Register from EEPROM and the
second time is to shift out the EE Register
contents through Dout pin.
©2005-8 Peregrine Semiconductor Corp. All rights reserved.
EEPROM
EE Register
load from
EE Register
shifted out
through Dout
The final set
EEPROM
of Dout is
content
Page 11 of 17

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