STM3220G-SK/IAR STMicroelectronics, STM3220G-SK/IAR Datasheet - Page 92
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STM3220G-SK/IAR
Manufacturer Part Number
STM3220G-SK/IAR
Description
DEV KIT STM32F207ZG KICKSTART
Manufacturer
STMicroelectronics
Series
IAR Kickstartr
Type
MCUr
Specifications of STM3220G-SK/IAR
Contents
Hardware, Software and Documentation
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
STM32F207
Other names
497-11404
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Electrical characteristics
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All I/Os are CMOS and TTL compliant (no software configuration required). Their
characteristics cover more than the strict CMOS-technology or TTL parameters.
Output driving current
The GPIOs (general purpose input/outputs) can sink or source up to ±8 mA, and sink or
source ±20 mA (with a relaxed V
In the user application, the number of I/O pins which can drive current must be limited to
respect the absolute maximum rating specified in
●
●
Output voltage levels
Unless otherwise specified, the parameters given in
performed under ambient temperature and V
Table
Table 42.
1. PC13, PC14, PC15 and PI8 are supplied through the power switch. Since the switch only sinks a limited
2. The I
3. The I
4. Based on characterization data, not tested in production.
V
V
Symbol
V
V
V
V
V
V
OH
OH
OL
OL
OH
OL
OH
amount of current (3 mA), the use of GPIOs PC13 to PC15 and PI8 in output mode is limited: the speed
should not exceed 2 MHz with a maximum load of 30 pF and these I/Os must not be used as a current
source (e.g. to drive an LED).
and the sum of I
Table 8
OL
(2)(4)
(2)(4)
(3)(4)
(3)(4)
The sum of the currents sourced by all the I/Os on V
consumption of the MCU sourced on V
I
The sum of the currents sunk by all the I/Os on V
consumption of the MCU sunk on V
I
VDD
VSS
(2)
(3)
(2)
(3)
10. All I/Os are CMOS and TTL compliant.
IO
IO
current sunk by the device must always respect the absolute maximum rating specified in
current sourced by the device must always respect the absolute maximum rating specified in
(see
and the sum of I
(see
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
Output voltage characteristics
Table
Table
IO
(I/O ports and control pins) must not exceed I
8).
8).
IO
Parameter
(I/O ports and control pins) must not exceed I
Doc ID 15818 Rev 6
OL
/V
OH
).
SS
DD,
cannot exceed the absolute maximum rating
DD
(1)
cannot exceed the absolute maximum rating
supply voltage conditions summarized in
2.7 V < V
2.7 V < V
2.7 V < V
2 V < V
Section
I
Conditions
I
IO
I
CMOS port
I
Table 42
IO
IO
IO
TTL port
SS
= +20 mA
= +8 mA
= +6 mA
VSS
=+ 8mA
DD
DD
DD
DD
plus the maximum Run
DD,
.
5.2:
< 2.7 V
< 3.6 V
< 3.6 V
< 3.6 V
STM32F205xx, STM32F207xx
plus the maximum Run
VDD
are derived from tests
.
V
V
V
DD
DD
DD
Min
2.4
-
-
-
-
–0.4
–1.3
–0.4
Max
0.4
0.4
1.3
0.4
-
-
-
-
Table 8
Unit
V
V
V
V
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