STM3220G-SK/IAR STMicroelectronics, STM3220G-SK/IAR Datasheet - Page 48
![no-image](/images/manufacturer_photos/0/6/637/stmicroelectronics_sml.jpg)
STM3220G-SK/IAR
Manufacturer Part Number
STM3220G-SK/IAR
Description
DEV KIT STM32F207ZG KICKSTART
Manufacturer
STMicroelectronics
Series
IAR Kickstartr
Type
MCUr
Specifications of STM3220G-SK/IAR
Contents
Hardware, Software and Documentation
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
STM32F207
Other names
497-11404
- Current page: 48 of 163
- Download datasheet (3Mb)
Pinouts and pin description
Table 5.
1. I = input, O = output, S = supply, HiZ = high impedance.
2. FT = 5 V tolerant; TT = 3.6 V tolerant.
3. Function availability depends on the chosen device.
4. PC13, PC14, PC15 and PI8 are supplied through the power switch. Since the switch only sinks a limited amount of current
5. Main function after the first backup domain power-up. Later on, it depends on the contents of the RTC registers even after
6. FT = 5 V tolerant except when in analog mode or oscillator mode (for PC14, PC15, PH0 and PH1).
7. If the device is delivered in an UFBGA176 package and if the REGOFF pin is set to V
8. FSMC_NL pin is also named FSMC_NADV on memory devices.
9. RFU means “reserved for future use”. This pin can be tied to V
48/163
61 B7 95 139 167 A5
62 A7 96 140 168 B4
63 D8
64 D9 100 144 172 C5
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(3 mA), the use of GPIOs PC13 to PC15 and PI8 in output mode is limited: the speed should not exceed 2 MHz with a
maximum load of 30 pF and these I/Os must not be used as a current source (e.g. to drive an LED).
reset (because these registers are not reset by the main reset). For details on how to manage these I/Os, refer to the RTC
register description sections in the STM32F20x and STM32F21x reference manual, available from the STMicroelectronics
website: www.st.com.
as an internal Reset (active low).
C8
-
-
-
-
-
-
-
-
97 141 169 A4
98 142 170 A3
99 143 171 C6
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Pins
STM32F20x pin and ball definitions (continued)
-
-
- 173 D4
- 174 C4
- 175 C3
- 176 C2
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-
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D5
-
-
Pin name
IRROFF
RFU
V
V
PB8
PB9
PE0
PE1
V
PI4
PI5
PI6
PI7
DD_3
SS_3
SS
(9)
Doc ID 15818 Rev 6
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O
S
S
S
DD
(after reset)
function
,V
IRROFF
V
V
SS
Main
PB8
PB9
PE0
PE1
V
PI4
PI5
PI6
PI7
SS_3
DD_3
SS
or left unconnected.
(3)
TIM8_CH1 / DCMI_VSYNC
TIM4_ETR / FSMC_NBL0 /
OTG_FS_SDA/ SDIO_D5 /
TIM10_CH1 / DCMI_D6 /
FSMC_NBL1 / DCMI_D3
TIM4_CH4/ TIM11_CH1/
DCMI_D7 / I2C1_SDA /
TIM8_BKIN / DCMI_D5
TIM8_CH2 / DCMI_D6
TIM8_CH3 / DCMI_D7
SPI2_NSS/ I2S2_WS
I2C1_SCL/ CAN1_RX
TIM4_CH3/SDIO_D4/
Alternate functions
ETH_MII_TXD3 /
DD
OTG_FS_SCL/
STM32F205xx, STM32F207xx
(Regulator OFF), then PA0 is used
CAN1_TX
DCMI_D2
/
functions
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