STM3220G-SK/IAR STMicroelectronics, STM3220G-SK/IAR Datasheet - Page 19
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STM3220G-SK/IAR
Manufacturer Part Number
STM3220G-SK/IAR
Description
DEV KIT STM32F207ZG KICKSTART
Manufacturer
STMicroelectronics
Series
IAR Kickstartr
Type
MCUr
Specifications of STM3220G-SK/IAR
Contents
Hardware, Software and Documentation
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
STM32F207
Other names
497-11404
- Current page: 19 of 163
- Download datasheet (3Mb)
STM32F205xx, STM32F207xx
2.2.9
2.2.10
DMA
The flexible 16-stream general-purpose DMAs (8 streams for DMA1 and 8 streams for
DMA2) are able to manage memory-to-memory, peripheral-to-memory and memory-to-
peripheral transfers. They share some centralized FIFOs for APB/AHB peripherals, support
burst transfer and are designed to provide the maximum peripheral bandwidth (AHB/APB)
and performance.
The two DMA controllers support circular buffer management, so that no specific code is
needed when the controller reaches the end of the buffer. The two DMA controllers also
have a double buffering feature, which automates the use and switching of two memory
buffers without requiring any special code.
Each stream is connected to dedicated hardware DMA requests, with support for software
trigger on each stream. Configuration is made by software and transfer sizes between
source and destination are independent.
The DMA can be used with the main peripherals:
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FSMC (flexible static memory controller)
The FSMC is embedded in the STM32F205xx and STM32F207xx family. It has four Chip
Select outputs supporting the following modes: PC Card/Compact Flash, SRAM, PSRAM,
NOR Flash and NAND Flash.
Functionality overview:
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LCD parallel interface
The FSMC can be configured to interface seamlessly with most graphic LCD controllers. It
supports the Intel 8080 and Motorola 6800 modes, and is flexible enough to adapt to
specific LCD interfaces. This LCD parallel interface capability makes it easy to build cost-
effective graphic applications using LCD modules with embedded controllers or high
performance solutions using external controllers with dedicated acceleration.
SPI and I
I
USART and UART
General-purpose, basic and advanced-control timers TIMx
DAC
SDIO
Camera interface (DCMI)
ADC.
Write FIFO
Code execution from external memory except for NAND Flash and PC Card
The targeted frequency, f
when HCLK is at 120 MHz and external access is at 30 MHz when HCLK is at 60 MHz
2
C
2
S
CLK
Doc ID 15818 Rev 6
, is equal to HCLK/2, so external access is at 60 MHz
Description
19/163
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