HD64570F16 Renesas Electronics America, HD64570F16 Datasheet - Page 295

• Manufacturer Part Number: HD64570F16
• Description: IC SCA SRL COMM ADAPTER 88QFP
• Manufacturer: Renesas Electronics America

Specifications of HD64570F16

• Applications: ISDN
• Interface: Serial
• Voltage - Supply: 4.75 V ~ 5.25 V
• Package / Case: 88-QFP
• Mounting Type: Surface Mount
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 6.6 shows a memory-to-MSCI chained-block multi-frame transfer using four descriptors and
four buffers. In this example, data is added to the buffer during transmission. As described in the
table, after steps 1 and 2, the MPU writes additional transmit data to buffers 2 and 3 and at the
same time updates EDA to the start address of the descriptor indicating buffer 0. In this way, the
DMAC transfers the data in buffers 2 and 3 after the data in buffer 1. Since the DMAC remains
enabled after one frame has been transferred in multi-frame transfer mode, some frame end
interrupts (DMIB) remain unprocessed. The number of unprocessed interrupts is stored in the
frame end interrupt counter (FCT). When the FCT value is 1111 and frame transfer continues, a
counter overflow error occurs and the DMAC terminates data transfer after transmitting the
current frame. The FCT value is then reset to 0000, and a DMIA interrupt is generated (if
enabled). For details, see sections 6.2.8, DMA Mode Register (DMR), and 6.2.9, Frame End
Interrupt Counter (FCT).
Table 6.6
Step
1
2
3
4
5
6
7
A
CDA: Current descriptor address register
EDA: Error descriptor address register
DE bit: Bit 1 of the DMA status register (DSR)
n
:
DMAC
Operation
—
Reads data
from buffer 0
A
—
—
Reads data
from buffer 1
A
Start address of each descriptor
1
2
‡ CDA
‡ CDA
Memory-to-MSCI Chained-Block Multi-Frame Transfer Mode (transmit data
added during transmission)
MPU
Operation
A
A
1 ‡ DE bit
—
—
Loads
transmit data
into buffer 2
A
Loads
transmit data
into buffer 3
A
—
—
0
2
3
0
‡ CDA
‡ EDA
‡ EDA
‡ EDA
CDA
Value
A
A
A
A
A
A
A
0
0
1
1
1
1
2
EDA
Value
A
A
A
A
A
A
A
2
2
2
3
0
0
0
DE Bit
Value
1
1
1
1
1
1
1
Note
Specifies the buffer containing
data to be transmitted using CDA
(see figure 6.16)
Adds transmit data to the buffer,
and rewrites EDA.
(see figure 6.16)
Rev. 0, 07/98, page 279 of 453