DP83266VF National Semiconductor, DP83266VF Datasheet - Page 27

• Manufacturer Part Number: DP83266VF
• Description: IC MEDIA ACSS CTRL INTF 160PQFP
• Manufacturer: National Semiconductor

Specifications of DP83266VF

• Applications: *
• Voltage - Supply: 4.75 V ~ 5.25 V
• Package / Case: 160-BFQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Interface: -
• Other names: *DP83266VF

5 0 Functional Description
(Ring Engine)
On the PHY Request interface parity is generated for inter-
nally sourced fields (such as the SA or FCS on frames when
not using SA or FCS transparency and internally generated
Beacon Claim and Void frames) Odd parity is always gen-
erated for PRP This allows through parity support at the
PHY interface even if parity is not used at the MAC inter-
face This is very desirable since every byte of data that
traverses the ring travels across the PHY Interface which is
actually part of the ring
Through parity is not supported in the Control Interface Reg-
isters and the Parameter RAM Parity is generated and
stripped at the Control Interface
Handling Parity Errors
Parity errors are reported in the Exception Status Register
when parity on that interface is enabled
A parity error at the PHY interface (when Mode PIP is set) is
treated as a code violation and ESR PPE is set If the parity
error occurs in the middle of token or frame reception the
token or frame is stripped a Format Error is signalled
(FOERROR) and the Lost Count is incremented
A parity error at the MAC Interface (when Mode MRP is set)
during a frame transmission from the MAC interface (while
TXACK is asserted) causes the frame transmission to be
aborted When a frame is aborted a Void frame is transmit-
ted to reset every station’s TVX timer A parity error (when
enabled) causes ESR MPE to be set
A parity error at the Control Interface (when Mode CBP is
set) will cancel the current write access ESR CPE is set to
indicate that a parity error occurred and ESR CCE is set to
indicate that the write was not performed
5 12 HANDLING INTERNAL ERRORS
Errors internal to the Ring Engine cause a MAC Reset This
includes detecting illegal states in the state machines Inter-
nal Errors are reported in the Internal Error Latch Register
(IELR) After an internal state machine error is detected and
reported
IELR TSMERR for the transmitter) the current state regis-
ters continue to be updated as always
In diagnose mode the Current Receive and Transmit Status
Registers are frozen with the errored state until the internal
state machine error condition is cleared (IELR RSMERR
and or IELR TSMERR)
6 0 Functional Description
(Service Engine)
6 1 OVERVIEW
The Service Engine consists of two major blocks the Indi-
cate Machine and the Request Machine These blocks
share the Bus Interface Unit Status Space Machine Point-
er RAM and Limit RAM blocks
The Service Engine provides an interface between the Ring
Engine FDDI Media Access Control Protocol block and a
host system The Service Engine transfers FDDI frames be-
tween the FDDI device and host memory
(IELR RSMERR
(Continued)
for
the
receiver
and
27
6 1 1 Indicate Machine
On the Receive side (from the ring) the Indicate Machine
sequences through the incoming byte stream from the Ring
Engine Received frames are sorted onto Indicate Channels
and a decision is made whether or not to copy them to host
memory The Indicate Machine uses the control signals pro-
vided by the Ring Engine Receive State Machine on the
MAC Indicate Interface to make this decision
6 1 2 Request Machine
On the Transmit side (to the ring) the Request Machine pre-
pares one or more frames from host memory for transmis-
sion to the Ring Engine The Request Machine provides all
the control signals to drive the Ring Engine Request Inter-
face
6 2 OPERATION
6 2 1 Indicate Operation
The Indicate Block accepts data from the Ring Engine as a
byte stream
Upon receiving the data the Indicate Block performs the
following functions
The Indicate Machine decodes the Frame Control (FC) field
to determine the type of frame The following types of
frames are recognized Logical Link Control (LLC) Restrict-
ed Token Unrestricted Token Reserved Station Manage-
ment (SMT) SMT Next Station Addressing MAC Beacon
MAC Claim Other MAC and Implementer
The Indicate Machine sorts incoming frames onto Indicate
Channels according to the frame’s FC field the state of the
AFLAG signal from the Ring Engine (which indicates that
the MACSI device had an internal address match) and the
host-defined sorting mode programmed in the Sort Mode
field of the Indicate Mode Register SMT and MAC frames
are always sorted onto Indicate Channel 0 On Indicate
Channels 1 and 2 frames can be sorted according to
whether they are synchronous or asynchronous or whether
they are high-priority asynchronous or low-priority asynchro-
nous Frames can also be sorted by whether their address
matches an internal (MACSI device) or external address or
based on header and Information fields for all non-MAC
SMT frames
The Synchronous Asynchronous Sort Mode is intended for
use in end-stations or applications using synchronous trans-
mission
Decodes the Frame Control field to determine the frame
type
Sorts the received frames onto Channels according to
the Sort Mode
Optionally Filters identical MAC frames
Filters Void frames
Copies the received frames to memory according to
Copy Criteria
Writes status for the received frames to the Indicate
Status Queue
Issues interrupts to the host on host-defined status
breakpoints