DP83266VF National Semiconductor, DP83266VF Datasheet - Page 102

• Manufacturer Part Number: DP83266VF
• Description: IC MEDIA ACSS CTRL INTF 160PQFP
• Manufacturer: National Semiconductor

Specifications of DP83266VF

• Applications: *
• Voltage - Supply: 4.75 V ~ 5.25 V
• Package / Case: 160-BFQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Interface: -
• Other names: *DP83266VF

Bit
D0
D1
D2
D3
D4
7 0 Control Information
Request Attention Register (RAR)
The Request Attention Register (RAR) is used to present exception breakpoint request complete and unserviceable request
attentions generated by each Request Channel Each bit may be enabled by setting the corresponding bit in the Request Notify
Register
All bits in this register are set to Zero upon reset
Access Rules
Register Bits
USRR0
D7
Address
Symbol
BRKR1
EXCR1
RCMR1
USRR1
BRKR0
10Eh
RCMR0
D6
Breakpoint on RCHN1 Is set by the MACSI device when a CNF Descriptor is written on RCHN1 No action is
taken by the MACSI device if the host sets this bit
Exception on RCHN1 Is set by the MACSI device when an exception occurs on RCHN1 An exception
condition consists of one of the following events ABus Error Consistency Failure (REQ or ODUD) BMAC
MAC Reset Timeout (TRT expires) BMAC abort (MAC frame received or FC Request Class inconsistency)
RINGOP change host abort (via SAR register) FIFO underrun or confirmation exception (for full
Confirmation) No action is taken by the MACSI device if the host sets this bit
This bit indicates that a request on RCHN1 did not complete normally This implies that an exception event
occurred or that the Request is improperly formed The corresponding Confirmation (CNF) Descriptor will give
more status about the failure The additional information in the CNF descriptor should be used to make a
decision about the severity of the error If the exception was caused by an ABus error the RQSTOP will also
be set
Request Complete on RCHN1 Is set by the MACSI device when it has completed processing a Request
object on RCHN1 (note that the MACSI may set this bit before writing the CNF descriptor to the CNF queue)
This completion may be a normal completion where a request object was transmitted without error It may also
be an abnormal completion due to one of the exception conditions listed above in EXCR1 No action is taken if
the Host sets this bit
Unserviceable Request on RCHN1 Is set by the MACSI device when a Request cannot be processed on
RCHN1 This occurs when the Request Class is inappropriate for the current ring state (e g Asynchronous
transmission while RINGOP
clearing the ABR bit in the Service Attention Register While this bit is set no requests will be processed on
RCHN1
The host must clear this bit to resume request processing If the USRR1 was set due to lack of CNF space this
condition must be corrected by giving the MACSI device more CNF space before restarting the channel If it
was due to a request class RINGOP incompatibility then the reason for the incompatibility must be resolved
Breakpoint on RCHN0 Is set by the MACSI device when a CNF Descriptor is written on RCHN0 No action is
taken by the MACSI device if the host sets this bit
Always
EXCR0
Read
D5
BRKR0
(Continued)
D4
Conditional
Write
e
0) or when there is no CNF status space or when the host aborts a request by
USRR1
D3
102
RCMR1
D2
Description
EXCR1
D1
BRKR1
D0