NCN6804MNR2G ON Semiconductor, NCN6804MNR2G Datasheet - Page 19

• Manufacturer Part Number: NCN6804MNR2G
• Description: IC SMART CARD DUAL W/SPI 32-QFN
• Manufacturer: ON Semiconductor

Specifications of NCN6804MNR2G

• Applications: Smart Card
• Interface: 4-Wire SPI Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Package / Case: 32-TFQFN Exposed Pad
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: NCN6804MNR2G; NCN6804MNR2GOSTR

Bank have an individual physical address, the system can
control 2 of these chips by sending the data content within
the same CS frame as depicted in Figure 13. The bits are
decoded on the fly and the related sub blocks are updated
accordingly. According to the SPI general specification, no
code or activity will be transferred to any chip when the CS
is High.
MOSI line, the CLK_SPI sequence must be separated by at
least one half positive period of this clock (see td
parameter).
SPI communication protocol.
Special Mode
Normal Mode
Since the 2 dual circuits present in the Asynchronous
When 2 SPI dual bytes are sequentially transferred on the
The oscillograms given Figures 14 and 15 illustrate the
ADDRESS
SET_VCC
SET_RST
SET_CLK
DECODE
SPI_CLK
Special mode
MOSI
MISO
MISO
CS
MPU Enables
Clock
MISO Line = High Impedance
MISO Line = High Impedance
MSB
B7
ADDRESS
CHIP
B6
B5
Figure 13. Basic Multi Command SPI Bytes
Figure 15. MISO Read Out Sequences
Chip Nx
B4
Normal Mode: MISO is synchronized with
the SPI_CLK Negative going slope
AND CONTROL
COMMAND
B3
Select Chip from SYNCHRONOUS Bank
http://onsemi.com
B2
clk
B1
19
B0
LSB
tdclk
Standard mode
Figure 14. Programming Sequence
MSB
B7
B6
B5
B4
Chip Ny
Special Mode: MISO
is synchronized with
the SPI_CLK Positive
going slope
B3
B2
B1
B0
LSB