NS7520B-1-C36 Digi International, NS7520B-1-C36 Datasheet - Page 83

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NS7520B-1-C36

Manufacturer Part Number
NS7520B-1-C36
Description
IC ARM MICROPROCESSOR 177BGA
Manufacturer
Digi International
Series
NET+ARM®r
Datasheets

Specifications of NS7520B-1-C36

Applications
Network Processor
Core Processor
ARM7
Program Memory Type
External Program Memory
Controller Series
-
Ram Size
External
Interface
EBI/EMI, Ethernet, DMA, SPI, UART
Number Of I /o
16
Voltage - Supply
1.4 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
177-LFBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Register bit definition
Table 27: Timer Control registers bit definition
D31
D30
D29
D28
Bits
TE
15
31
30
TIE
14
R/W
R/W
R/W
R/W
Access
TIMEOUT = [4096 * (TC + 1)] / F
TIMEOUT = (TC + 1) / F
TIRO
29
13
TPRE
28
12
TE
TIE
TIRO
TPRE
Mnemonic
TCLK
27
11
26
10
SYSCLK
0
0
0
0
Reset
25
9
XTALE
24
8
Timer enable
1
0
The other fields in this register should be configured before
or during the same memory cycle in which TE is set to 1.
Timer interrupt enable
When set to 1, allows the timer to interrupt the CPU. A
timer interrupt is generated when the hardware sets the TIP
bit in the Timer Status register (see "Timer Status registers"
on page 73).
Timer interrupt mode
0
1
Controls the type of interrupt the timer asserts to the CPU.
Timer prescaler
0
1
Determines whether the 9-bit prescaler will be used in
calculating the TIMEOUT parameter. The prescaler allows
for longer TIMEOUT values.
TPRE affects TIMEOUT only when F
time source.
Description
ITC
w w w . d i g i e m b e d d e d . c o m
23
Allows the timer to operate.
Resets and disables the timer.
Normal interrupt
Fast interrupt
Disable 9-bit prescaler
Enable 9-bit prescaler
7
22
6
ITC
21
5
TCLK = 0; TPRE = 1
TCLK = 1; TPRE = x
20
4
19
3
XTALE
18
2
G E N M o d u l e
17
is used as a
1
16
0
7 1

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