W83627UHG Nuvoton Technology Corporation of America, W83627UHG Datasheet - Page 38
W83627UHG
Manufacturer Part Number
W83627UHG
Description
IC I/O CONTROLLER 128-QFP
Manufacturer
Nuvoton Technology Corporation of America
Specifications of W83627UHG
Applications
PC's, PDA's
Interface
LPC
Voltage - Supply
3.3V, 5V
Package / Case
128-XFQFN
Mounting Type
Surface Mount
Pin Count
128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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W83627UHG
7.2.1
LPC Interface
The internal registers of the hardware monitor block are accessible through two separate methods on
the LPC bus. The first set of registers, which primarily enables the block and sets its address in the
CPU I/O address space are accessed by the Super I/O protocol described in Chapter 6 at address
2Eh/2Fh or 4Eh/4Fh. The bulk of the functionality and internal registers of this block are accessed
from an index/data pair of CPU I/O addresses. The standard locations are usually 295h/296h and are
set by CR60 and CR61 accessed using the Super I/O protocol as described in Chapter 6.
Due to the number of internal registers, it is necessary to separate the register sets into “banks”
specified by register 4Eh. The structure of the internal registers is shown in the following figure.
Publication Release Date: May 25, 2007
-27-
Revision 1.0
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