W83627UHG Nuvoton Technology Corporation of America, W83627UHG Datasheet - Page 147

• Manufacturer Part Number: W83627UHG
• Description: IC I/O CONTROLLER 128-QFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627UHG

• Applications: PC's, PDA's
• Interface: LPC
• Voltage - Supply: 3.3V, 5V
• Package / Case: 128-XFQFN
• Mounting Type: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

When the KBC receives data that follows a "D1" command, the hardware control logic sets or clears
GATE A20 according to received data bit 1. Similarly, the hardware control logic sets or clears
KBRESET depending on received data bit 0. When the KBC receives an "FE" command, the
KBRESET is pulse low for 6 μs (Min.) with a 14 μs (Min.) delay.
GATE A20 and KBRESET are controlled by either software or hardware logic, and they are mutually
exclusive. Then, GATE A20 and KBRESET are merged with Port92 when the P92EN bit is set.
BIT
5-3
7
6
2
1
0
KCLKS1.
KCLKS0.
RESERVED.
P92EN (Port 92 Enable).
1: Enables Port 92 to control GATEA20 and KBRESET.
0: Disables Port 92 functions.
HGA20 (Hardware GATEA 20).
1: Selects hardware GATE A20 control logic to control GATE A20 signal.
0: Disables GATEA20 control logic functions.
HKBRST (Hardware Keyboard Reset).
1: Selects hardware KB RESET control logic to control KBRESET signal.
0: Disables hardware KB RESET control logic function.
-136-
DESCRIPTION
Select the KBC clock rate.
Bits
7 6
0 0: KBC clock input is 6 MHz.
0 1: KBC clock input is 8 MHz.
1 0: KBC clock input is 12 MHz.
1 1: KBC clock input is 16 MHz.
W83627UHG