W83627UHG Nuvoton Technology Corporation of America, W83627UHG Datasheet - Page 189

• Manufacturer Part Number: W83627UHG
• Description: IC I/O CONTROLLER 128-QFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627UHG

• Applications: PC's, PDA's
• Interface: LPC
• Voltage - Supply: 3.3V, 5V
• Package / Case: 128-XFQFN
• Mounting Type: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

CR E3h. (Event Status Register; Default 08h), continued
CR E4h. (Default 00h)
6~5
1~0
BIT
BIT
4
3
2
1
0
7
4
3
2
READ / WRITE
Reserved.
Reserved.
READ / WRITE
Read-Clear
Read-Clear
Read-Clear
Read-Clear
Read-Clear
Read Only
Read Only
Read Only
Read Only
Read Only
R / W
R / W
R / W
R / W
If E4[7] is 1 =>
This bit is 0: When power loss occurs and VSB power is on, it indicates
that the system power is turned on.
This bit is 1: When power loss occurs and VSB power is on, it indicates
that the system power is turned off.
If E4[7] is 0 => This bit is always 0.
Thermal shutdown status.
0: No thermal shutdown event is issued.
1: The thermal shutdown event is issued.
PSIN_STS
0: No PSIN event is issued.
1: The PSIN event is issued.
MSWAKEUP_STS => The bit is latched by the mouse wake-up event.
0: No mouse wake-up event is issued.
1: The mouse wake-up event is issued.
KBWAKEUP_STS => The bit is latched by the keyboard wake-up event.
0: No keyboard wake-up event is issued.
1: The keyboard wake-up event is issued.
Disable / Enable power loss control function (LDA: CRE4[6:5]) for Intel
chipset. (VBAT)
0: Disable.
1: Enable.
Power-loss control bits => (VBAT)
00: System always turns off when it returns from the power-loss state.
01: System always turns on when it returns from the power-loss state.
10: System turns off / on when it returns from the power-loss state
11: User defines the state before power loss.(i.e. the last state set of
Keyboard wake-up options. (LRESET#)
0: Password or sequence hot keys programmed in the registers.
1: Any key.
Enable the hunting mode for all wake-up events set in CRE0. This bit is
cleared when any wake-up events is captured. (LRESET#)
0: Disable.
1: Enable.
depending on the state before the power loss.
CRE6[4])
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DESCRIPTION
DESCRIPTION
W83627UHG