W83627EHG Nuvoton Technology Corporation of America, W83627EHG Datasheet - Page 186
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W83627EHG
Manufacturer Part Number
W83627EHG
Description
IC I/O CONTROLLER 128-QFP
Manufacturer
Nuvoton Technology Corporation of America
Specifications of W83627EHG
Applications
PC's, PDA's
Interface
LPC
Voltage - Supply
3.3V
Package / Case
128-XFQFN
Mounting Type
Surface Mount
Pin Count
128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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10.3.14 DMA Transfers
DMA transfers are always to or from the ecpDFifo, tFifo, or CFifo. DMA uses the standard PC DMA
services. The ECP requests DMA transfers from the host by activating the PDRQ pin. The DMA
empties or fills the FIFO using the appropriate direction and mode. When the terminal count in the DMA
controller is reached, an interrupt is generated, and serviceIntr is asserted, which will disable the DMA.
10.3.15 Programmed I/O (NON-DMA) Mode
The ECP and parallel port FIFOs can also be operated using interrupt-driven, programmed I/O.
Programmed I/O transfers are
The host must set dmaEn and serviceIntr to 0 and also must set the direction and state accordingly in
the programmed I/O transfers.
The ECP requests programmed I/O transfers from the host by activating the IRQ pin. The programmed
I/O empties or fills the FIFO using the appropriate direction and mode.
1. To the ecpDFifo at 400h and ecpAFifo at 000h
2. From the ecpDFifo located at 400h
3. To / from the tFifo at 400h.
W83627EHF/EF, W83627EHG/EG
-175-
Publication Release Date: April 7, 2009
Version 1.94
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