PI7C9X7952AFDE Pericom Semiconductor, PI7C9X7952AFDE Datasheet - Page 23

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PI7C9X7952AFDE

Manufacturer Part Number
PI7C9X7952AFDE
Description
IC PCIE-TO-UART BRIDGE 128LQFP
Manufacturer
Pericom Semiconductor
Datasheets

Specifications of PI7C9X7952AFDE

Applications
PCIe-to-Uart Bridge
Interface
Advanced Configuration Power Interface (ACPI)
Voltage - Supply
1.8V, 3.3V
Package / Case
128-LQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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5.2.12. Baud Rate Generation
The built-in Baud Rate Generator (BRG) allows a wide range of input frequency and flexible Baud Rate
generation. To obtain the desired Baud Rate, the user can set the Sample Clock Register (SCR), Divisor
Latch Low Register (DLL), Divisor Latch High Register (DLH) and Clock Prescale Registers (CPRM and
CPRN). The Baud Rate is generated according to the following equation:
The parameters in the equation above can be programmed by setting the “SCR”, “DLL”, “DLH”, “CPRM”
and “CPRN” registers according to the table below.
To ensure the proper operation of the Baud Rate Generator, users should avoid setting the value ‘0’ to
Sample Clock, Divisor and Prescaler.
The following table lists some of the commonly used Baud Rates and the register settings that generate a
specific Baud Rate. The examples assume an Input Clock frequency of 14.7456 Mhz. The SCR register is
set to ‘0h’, and the CPRM and CPRN registers are set to ‘1h’ and ‘0h’ respectively. In these examples, the
Baud Rates can be generated by different combination of the DLH and DLL register values.
5.2.13. Power Management
The PI7C9X7952 supports the D0, D1, D2 and D3 power states. The device is compliant with PCI Power
Management Specification Revision 1.2.
September 2009 – Revision 1.3
Pericom Semiconductor
BaudRate
Setting
Divisor
Prescaler
SampleClock
M
N
Table 5-3 Sample Baud Rate Setting
Baud Rate
921,600
115,200
19,200
28,800
38,400
57,600
1,200
2,400
4,800
9,600
Table 5-2 Baud Rate Generator Setting
Divisor
InputFrequ
DLH
3h
1h
0h
0h
0h
0h
0h
0h
0h
0h
09-0087
*
Pr
Description
DLL + (256 * DLH)
CPRM, (CPRM = ‘01h’ to ‘02h’)
CPRN, (CPRN = ‘0h’ to ‘7h’)
16
2
escaler
M
ency
DLL
1
C0h
00h
80h
60h
30h
20h
18h
10h
08h
01h
SCR
( *
SampleCloc
,
Page 23 of 68
(SCR = ‘0h’ to ‘Ch’)
k
N
)
PCI Express® Dual UART
PI7C9X7952
Datasheet

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