SCAN12100TYA/NOPB National Semiconductor, SCAN12100TYA/NOPB Datasheet - Page 17

• Manufacturer Part Number: SCAN12100TYA/NOPB
• Description: IC SERIAL/DESERIAL CPRI 100-TQFP
• Manufacturer: National Semiconductor
• Series: SCANr

Specifications of SCAN12100TYA/NOPB

• Function: Serializer/Deserializer
• Data Rate: 614.4Mbps
• Input Type: LVTTL/LVCMOS
• Output Type: LVTTL, LVCMOS
• Number Of Inputs: 10
• Number Of Outputs: 10
• Voltage - Supply: 1.8 V ~ 3.3 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: SCAN12100TYA

Transmitter Reset Options
RECEIVE DATAPATH
Receive Serial Data Input
The receive input (RIN) pins are terminated with on-chip
50Ω ±20% resistors to an internal bias voltage. This bias volt-
Receive Equalization
The receiver front-end provides 3 steps of equalization filter
to compensate for ISI deterministic jitter from lossy back-
Receive Output Bus
Receive output data ROUT[9:0] is clocked on both rising and
falling edges of RXCLK. By using both RXCLK edges, the
Rx Output
ROUT[0]
ROUT[1]
ROUT[2]
EQ[1]
0
0
1
1
TXPWDNB
0
1
1
1
1
1
1
1
Missing REFCLK
EQ[0]
Missing TXCLK
0
1
0
1
Not Locked
Not Locked
Tx PLL
Locked
Locked
Locked
10-bit Mode (TENBMODE = 1)
X
TABLE 10. Receiver Parallel Output Bus Mapping
Equalization disabled.
Equalization (approximately 2 dB).
Equalization (approximately 4 dB).
Equalization (approximately 8 dB).
FIGURE 4. SCAN12100 Serial Input Connection
TABLE 9. Receiver Equalizer Control Settings
Coded Data Bit
Coded Data Bit
Coded Data Bit
TABLE 8. Transmitter Output Truth Table
Valid Dx.y or Kx.y
Invalid Kx.y
DIN[9:0]
x
x
x
x
x
x
17
age is set to approximately 1.45 volts above GND. Normally
CML signals are AC-coupled and this bias voltage sets the
input common mode for the RIN inputs. DC coupling between
two SCAN12100 devices is acceptable when required in the
application. For other CML outputs AC coupling is required.
planes and cables. Pulling both EQ[1:0] pins low enables
MDIO control of equalization.
clock speed is halved, which reduces EMI issues. The re-
ceiver output bus can be configured in either read or write
mode.
Underflow / Overflow
Underflow / Overflow
Tx FIFO
Descriptions
8-bit Mode (TENBMODE = 0)
Data Bit 0 (A, lsb)
Serial Data (10-bit Mode)
Data Bit 1 (B)
Data Bit 2 (C)
pulled to internal bias
pulled to internal bias
K30.7 (8-bit Mode) or
DOUTP and DOUTN
DOUTP and DOUTN
10'd0 (10-bit Mode)
Normal Serial Data
K30.7 (8-bit Mode)
DOUTP/DOUTN
Undefined
Logic 1
20209571
www.national.com