AD9898KCP-20 Analog Devices Inc, AD9898KCP-20 Datasheet - Page 21

• Manufacturer Part Number: AD9898KCP-20
• Description: IC CCD SIGNAL PROC/GEN 48-LFCSP
• Manufacturer: Analog Devices Inc
• Type: CCD Signal Processor, 10-Bitr

Specifications of AD9898KCP-20

• Rohs Status: RoHS non-compliant
• Input Type: Logic
• Output Type: Logic
• Interface: 3-Wire Serial
• Mounting Type: Surface Mount
• Package / Case: 48-LFCSP
• Analog Front End Type: CCD
• Analog Front End Category: Video
• Interface Type: Serial (3-Wire)
• Input Voltage Range: 0.5V
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (typ): 3V
• Operating Supply Voltage (max): 3.6V
• Resolution: 10b
• Number Of Adc's: 1
• Power Supply Type: Analog/Digital
• Operating Temp Range: -20C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LFCSP EP
• Number Of Channels: 3
• Current - Supply: -
• Lead Free Status / RoHS Status: Not Compliant

Register Name
RGNEGLOC
H1POSLOC
SHPLOC
SHDLOC
DOUTPHASE
DCLKPHASE
The 2 MSB are used to select the quadrant.
Signal Name
RG
Signal Name
H1
Signal Name
cds
Signal Name
Data Output[9:0]
Signal Name
DCLK1
REV. 0
Table IX. Precision Timing Edge Locations for RG, H1, SHP, SHD, DCLK, and DOUTPHASE
Quadrant
I
II
III
IV
Bit Width
6
6
6
6
6
6
Quadrant
I
II
III
IV
Quadrant
I
II
III
IV
Quadrant
I
II
III
IV
DCLKPHASE Value
00
01
10
11
Table VIII. RG, H1, SHP, SHD, DCLK, and DOUTPHASE Timing Parameters
SHPLOC
000000 to 001011
010000 to 011011
100000 to 101011
110000 to 111011
Control (Addr 0x03)
Control (Addr 0x03)
Control (Addr 0x02)
Control (Addr 0x02)
Control (Addr 0x02)
Control (Addr 0x02)
Register Type
DOUTPHASE
000000 to 001011
010000 to 011011
100000 to 101011
110000 to 111011
H1POSLOC
000000 to 001011
010000 to 011011
100000 to 101011
110000 to 111011
RG Rising Edge
(Not Programmable)
Fixed at 000000
Fixed at 000000
Fixed at 000000
Fixed at 000000
cds Rising Edge
Data Output[9:0] Rising Edge
DCLKPHASE Rising Edge
P[6]
P[16]
P[26]
P[36]
Quadrant Range
P[0] to P[11]
P[12] to P[23]
P[24] to P[35]
P[36] to P[47]
H1 Rising Edge
–21–
Quadrant Range
P[0] to P[11]
P[12] to P[23]
P[24] to P[35]
P[36] to P[47]
0–47 Edge Location
0–47 Edge Location
0–47 Edge Location
0–47 Edge Location
Range
0–47 Edge Location
0–47 Edge Location
Quadrant Range
P[0] to P[11]
P[12] to P[23]
P[24] to P[35]
P[36] to P[47]
RGNEGLOC
000000 to 001011
010000 to 011011
100000 to 101011
110000 to 111011
000000 to 001011
100000 to 101011
110000 to 111011
SHDLOC
010000 to 011011
Description
Falling Edge Location for RG
Positive Edge Location for H1
Sample Location for SHP
Sample Location for SHD
Phase Location of Data Output [9:0]
Positive Edge of DCLK 1
RG Falling Edge
Data Output[9:0] Falling Edge
(Not Programmable)
DOUTPHASE + 24 Steps
DOUTPHASE + 24 Steps
DOUTPHASE + 24 Steps
DOUTPHASE + 24 Steps
DCLKPHASE Falling Edge
P[26]
P[36]
P[06]
P[16]
cds Falling Edge
H1 Falling Edge
(Not Programmable)
H1POSLOC + 24 Steps
H1POSLOC + 24 Steps
H1POSLOC + 24 Steps
H1POSLOC + 24 Steps
Quadrant Range
P[0] to P[11]
P[12] to P[23]
P[24] to P[35]
P[36] to P[47]
Quadrant Range
P[0] to P[11]
P[12] to P[23]
P[24] to P[35]
P[36] to P[47]
AD9898