AD9846AJSTRL Analog Devices Inc, AD9846AJSTRL Datasheet - Page 21

• Manufacturer Part Number: AD9846AJSTRL
• Description: IC CCD SIGNAL PROC 10BIT 48-LQFP
• Manufacturer: Analog Devices Inc
• Type: CCD Signal Processor, 10-Bitr

Specifications of AD9846AJSTRL

• Rohs Status: RoHS non-compliant
• Input Type: Logic
• Output Type: Logic
• Interface: 3-Wire Serial
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Analog Front End Type: CCD
• Analog Front End Category: Video
• Interface Type: Serial (3-Wire)
• Sample Rate: 30MSPS
• Input Voltage Range: 0.5V
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (typ): 3V
• Operating Supply Voltage (max): 3.6V
• Resolution: 10b
• Number Of Adc's: 1
• Power Supply Type: Analog/Digital
• Operating Temp Range: -20C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Number Of Channels: 1
• Current - Supply: -
• Lead Free Status / RoHS Status: Not Compliant

Internal Power-On Reset Circuitry
After power-on, the AD9846A will automatically reset all inter-
nal registers and perform internal calibration procedures. This
takes approximately 1 ms to complete. During this time, normal
clock signals and serial write operations may occur. However,
serial register writes will be ignored until the internal reset
operation is completed. Pin 43 (formerly RSTB on the AD984x
non-A products) is no longer used for the reset operation.
Toggling Pin 43 in the AD9846A will have no effect.
Grounding and Decoupling Recommendations
As shown in Figure 33, a single ground plane is recommended
for the AD9846A. This ground plane should be as continuous
as possible, particularly around Pins 25 through 39. This will
ensure that all analog decoupling capacitors provide the lowest
possible impedance path between the power and bypass pins
and their respective ground pins. All decoupling capacitors
should be located as close as possible to the package pins.
OUTPUTS
DATA
12
INTERFACE
SUPPLY
DRIVER
SERIAL
(MSB) D9
3V
NC
NC
D0
D1
D2
D3
D4
D5
D6
D7
D8
0.1 F
10
11
12
3
1
2
3
4
5
6
7
8
9
48 47 46 45 44
13 14 15 16 17 18 19 20 21 22 23 24
PIN 1
IDENTIFIER
ANALOG SUPPLY
0.1 F
(Not to Scale)
AD9846A
3V
TOP VIEW
43 42 41 40
ANALOG SUPPLY
3V
39 38
A single clean power supply is recommended for the AD9846A, but
a separate digital driver supply may be used for DRVDD (Pin
13). DRVDD should always be decoupled to DRVSS (Pin 14),
which should be connected to the analog ground plane. Advan-
tages of using a separate digital driver supply include using a lower
voltage (2.7 V) to match levels with a 2.7 V ASIC, reducing digital
power dissipation, and reducing potential noise coupling. If the
digital outputs (Pins 3–12) must drive a load larger than 20 pF,
buffering is recommended to reduce digital code transition noise.
Alternatively, placing series resistors close to the digital out-
put pins may also help reduce noise.
37
0.1 F
1.0 F
1.0 F
0.1 F
36
35
34
33
32
31
30
29
28
26
25
8
27
AUX1IN
AVSS
AUX2IN
AVDD2
BYP4
NC
CCDIN
BYP2
BYP1
AVDD1
AVSS
AVSS
CLOCK
INPUTS
NC = NO CONNECT
0.1 F
0.1 F
0.1 F
0.1 F
0.1 F
0.1 F
3V
ANALOG SUPPLY
3V
ANALOG SUPPLY
CCD SIGNAL
AD9846A