X96010V14IZ Intersil, X96010V14IZ Datasheet - Page 25

IC SENSOR CONDITIONER 14-TSSOP

X96010V14IZ

Manufacturer Part Number
X96010V14IZ
Description
IC SENSOR CONDITIONER 14-TSSOP
Manufacturer
Intersil
Type
Sensor Conditionerr
Datasheet

Specifications of X96010V14IZ

Input Type
Voltage
Output Type
Voltage
Interface
2-Wire
Current - Supply
15mA
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
X96010V14IZ
Manufacturer:
IDT
Quantity:
989
The Data Bytes are from the memory location indicated
by an internal pointer. This pointer initial value is deter-
mined by the Address Byte in the Read operation instruc-
tion, and increments by one during transmission of each
Data Byte. After reaching the memory location 10Fh, a
stop should be issued.
If the read operation continues, the output bytes are
unpredictable. If the address is set between 00h and
7Fh, the output bytes are unpredictable.
A Read operation internal pointer can start at any
memory location from 80h through FEh, when the
Address Byte is 80h through FEh respectively. But it
starts at location 100h if the Address Byte is FFh.
When reading any of the control registers 1, 2, 3, or 4,
the Data Bytes are always the content of the corre-
sponding nonvolatile cells, even if bit NV1234 is "0"
(See “Control and Status Register Format”).
Figure 21. Read Sequence
from the
Signals
Master
Signal at
Signals from
the Slave
SDA
S
a
t
r
t
1
0
1
Address
R/W = 0
Slave
0
with
25
0
A
C
K
Address
Byte
A
C
K
S
a
r
t
t
X96010
1
0
Address
R/W = 1
1
Slave
with
0
Data Protection
There are three levels of data protection designed into
the X96010: 1- Any Write to the device first requires
setting of the WEL bit in Control 6 register; 2- The
Write Protection pin disables any writing to the
X96010; 3- The proper clock count, data bit sequence,
and STOP condition is required in order to start a nonvol-
atile write cycle, otherwise the X96010 ignores the Write
operation.
WP: Write Protection Pin
When the Write Protection (WP) pin is active (LOW),
any Write operations to the X96010 is disabled, except
the writing of the WEL bit.
1
C
A
K
First Read
Data Byte
A
C
K
A
C
K
Last Read
Data Byte
October 25, 2005
FN8214.1
S
o
p
t

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