X96010V14IZ Intersil, X96010V14IZ Datasheet - Page 14

• Manufacturer Part Number: X96010V14IZ
• Description: IC SENSOR CONDITIONER 14-TSSOP
• Manufacturer: Intersil
• Type: Sensor Conditionerr

Specifications of X96010V14IZ

• Input Type: Voltage
• Output Type: Voltage
• Interface: 2-Wire
• Current - Supply: 15mA
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

VOLTAGE REFERENCE
The voltage reference to the A/D and D/A converters
on the X96010, may be driven from the on-chip volt-
age reference, or from an external source via the VRef
pin. Bit VRM in Control Register 0 selects between the
two options (See Figure 5).
The default value of VRM is “0”, which selects the
internal reference. When the internal reference is
selected, it’s output voltage is also an output at pin
VRef with a nominal value of 1.21 V. If an external
voltage reference is preferred, the VRM bit of the Con-
trol Register 0 must be set to “1”.
Figure 5. Voltage Reference Structure
Figure 6. A/D Converter Block Diagram
VRef Pin
From VRef
VSense Pin
VRM: bit 2 in Control register 0.
14
A/D Converter and
D/A Converters reference
Generator
Ramp
Reference
On-chip
Voltage
Comparator
X96010
Clock
Conversion Reset
A/D CONVERTER
The X96010 contains a general purpose, on-chip, 8-bit
Analog to Digital (A/D) converter whose output is avail-
able at the Status Register as bits AD[7:0]. By default
these output bits are used to select a row in the look-
up tables associated with the X96010’s Current Gen-
erators. When bit ADCfiltOff is “0” (default), bits
AD[7:0] are updated each time the ADC performs four
consecutive conversions with the same exact result at
the 6 MSBs. When bit ADCfiltOff is “1”, these bits are
updated after every ADC conversion.
A block diagram of the A/D converter is shown in Fig-
ure 6. The voltage reference input (see “VOLTAGE
REFERENCE” for details), sets the maximum ampli-
tude of the ramp generator output. The A/D converter
input signal (see “A/D Converter Input Select” below
for details) is compared to the ramp generator output.
The control and encode logic produces a binary
encoded output, with a minimum value of 00h (0
and a full scale output value of FFh (255
The A/D converter input voltage range (VIN
from 0 V to V(VRef).
Encode Logic
Control and
8
Status Register)
A/D Converter
(To LUTs and
10
).
Output
October 25, 2005
ADC
FN8214.1
) is
10
),