AD1892JR Analog Devices Inc, AD1892JR Datasheet - Page 8

• Manufacturer Part Number: AD1892JR
• Description: IC SAMPLE CONV W/RX 20BIT 28SOIC
• Manufacturer: Analog Devices Inc
• Type: Sample Rate Converterr

Specifications of AD1892JR

• Rohs Status: RoHS non-compliant
• Applications: Players, Recorders
• Voltage - Supply, Digital: 4.5 V ~ 5.5 V
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (7.5mm Width)
• Voltage - Supply, Analog: -

AD1892
SERIAL DIGITAL AUDIO TRANSMISSION STANDARDS
The AD1892 can receive S/PDIF (Sony/Philips Digital Interface
Format), AES/EBU (Audio Engineering Society/European
Broadcasting Union, also known as AES3-1992), IEC-958
(International Electrotechnical Commission) and CP-340 (EIAJ
[Electronic Industry Association of Japan] CP-1201) serial
streams. S/PDIF is a consumer audio standard, and AES/EBU
is a professional audio standard; IEC-958 and CP-340 have
both consumer and professional definitions. This data sheet is
not intended to fully define or to provide a tutorial for these
standards; please contact these international standards setting
bodies for the full specifications.
All of these digital audio serial communication schemes encode
audio data and audio control information using the biphase-
mark method. This encoding method minimizes the dc content
of the transmitted signal and allows the receiver to decode clock
information from the transmitted signal. As can be seen from
Figure 1, ones in the original data end up with midcell transi-
tions in the biphase-mark encoded data, while zeros in the origi-
nal data do not. Note that the biphase-mark encoded data
always has a transition between bit boundaries.
Digital audio communication schemes use “preambles” to dis-
tinguish between channels (called “subframes”) and between
longer term control information blocks (called “frames”). Pre-
ambles are particular biphase-mark patterns, which contain
encoding violations that allow the receiver to uniquely recognize
them. These patterns, and their relationship to frames and
subframes, are shown in Figures 2 and 3.
(2 TIMES BIT RATE)
BIPHASE-MARK
Figure 2. Biphase-Mark Encoded Preambles
CLOCK
X
Y
Z
DATA
DATA
Figure 1. Biphase-Mark Encoding
11101000 OR 00010111
11100010 OR 00011101
11100100 OR 00011011
BIPHASE PATTERNS
1
0
1
0
1
1
LEFT
RIGHT
LEFT AND C.S. BLOCK START
0
1
1
CHANNEL
0
1
1
0
0
0
1
0
1
–8–
The biphase-mark encoding violations are shown in Figure 4.
Note that all three preambles include encoding violations. Or-
dinarily, the biphase-mark encoding method results in a polarity
transition between bit boundaries.
As noted above, these serial digital audio communication
schemes are organized using a frame and subframe construction.
There are two subframes per frame (ordinarily the left and right
channel). Each subframe includes the appropriate four bit
preamble, four bits of “auxiliary” (aux) data, 20 bits of audio
data (LSB first), a “validity” (V) bit, a “user” (U) data bit, a
Channel Status (C) bit and an even parity (P) bit. The Channel
Status bits and the user bits accumulate over many frames to
convey control information. The Channel Status bits accumu-
late over a 192 frame period (called a Channel Status block).
The user bits accumulate over 1176 frames when the inter-
connect is implementing the so-called “subcode” scheme
(EIAJ CP-2401). The organization of the Channel Status
block, frames and subframes is shown in Figure 5.
X LEFT CH Y RIGHT CH Z LEFT CH Y RIGHT CH X LEFT CH Y RIGHT CH X
Figure 3. Preambles, Frames and Subframes
FRAME 191
PREAMBLE Z
PREAMBLE X
PREAMBLE Y
Figure 4. Preambles
FRAME
SUB-
1
1
1
START OF CHANNEL STATUS BLOCK
PREAMBLES
FRAME 0
1
1
1
1
1
1
FRAME
SUB-
0
0
0
0
0
1
1
0
0
1
0
0
FRAME 1
0
0
0
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