ADV7184BSTZ Analog Devices Inc, ADV7184BSTZ Datasheet - Page 81

IC DECODER VID SDTV MULTI 80LQFP

ADV7184BSTZ

Manufacturer Part Number
ADV7184BSTZ
Description
IC DECODER VID SDTV MULTI 80LQFP
Manufacturer
Analog Devices Inc
Type
Video Decoderr
Datasheets

Specifications of ADV7184BSTZ

Applications
Projectors, Recorders, Security
Voltage - Supply, Analog
3.15 V ~ 3.45 V
Voltage - Supply, Digital
1.65 V ~ 2 V
Mounting Type
Surface Mount
Package / Case
80-LQFP
Resolution (bits)
10bit
Adc Sample Rate
54MSPS
Power Dissipation Pd
550mW
No. Of Input Channels
12
Supply Voltage Range
1.65V To 2V, 3V To 3.6V
Operating Temperature Range
-40°C To +85°C
Tv /
RoHS Compliant
Input Format
Analogue
Output Format
Digital
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADV7184BSTZ
Manufacturer:
Analog Devices Inc
Quantity:
10 000
REGISTER ACCESSES
The MPU can write to and read from all of the ADV7184
registers except those that are read only or write only. The
subaddress register determines which register the next read or
write operation accesses. All communications with the part
through the bus start with an access to the subaddress register.
A read/write operation is then performed from/to the target
address, which then increments to the next address until a stop
command on the bus is performed.
REGISTER PROGRAMMING
The I
of its configuration. After the part has been accessed via the bus
and a read/write operation is selected, the subaddress is set up.
The subaddress register determines to/from which register the
operation takes place. Table 106 and Table 107 list the various
operations controlled by the subaddress register.
As can be seen in Figure 48, the registers in the ADV7184 are
arranged into two maps: the user map (enabled by default) and
the user sub map. The user sub map has controls for the interrupt
and VDP functionality of the ADV7184, and the user map controls
everything else.
The user map and the user sub map consist of a common space
from Address 0x00 to Address 0x3F. Depending on how Bit 5 in
Register 0x0E (SUB_USR_EN) is set, the register map is then
split into two sections.
SUB_USR_EN, Address 0x0E [5]
This bit splits the register map at Register 0x40.
0 (default)—The register map does not split and the user map
is enabled.
1—The register map splits and the user sub map is enabled.
NORMAL REGISTER SPACE
ADDRESSES 0x40 TO 0xFF
ADDRESSES 0x00 TO 0x3F
ADDRESS 0x0E BIT 5 = 0b
2
COMMON I
C Register Maps section describes each register in terms
Figure 48. Register Access —User Map and User Sub Map
I
USER MAP
2
C SPACE
2
C SPACE
INTERRUPT AND VDP REGISTER SPACE
USER SUB MAP
ADDRESSES 0x40 TO 0x9C
ADDRESS 0x0E BIT 5 = 1b
I
2
C SPACE
Rev. A | Page 81 of 112
I
An I
and is therefore distributed over two or more I
example, HSB [11:0].
When such a parameter is changed using two or more I
operations, the parameter may hold an invalid value for the time
between the first and last I
the parameter may hold the new value while the remaining bits
of the parameter still hold the previous value.
To avoid this problem, the I
updated bits of the parameter in local memory. All bits of the
parameter are updated together after the last register write
operation has completed.
The correct operation of the I
following:
I
A register programming script consisting of I
examples for all standard modes supported by the ADV7184 is
available from the ADV7184 product page on the Analog Devices
website. The examples provided are applicable to a system with the
analog inputs arranged as shown in Figure 52. The input selection
registers change in accordance with the layout of the PCB.
2
2
C SEQUENCER
C PROGRAMMING EXAMPLES
2
All I
written to in order of ascending addresses. For example,
for HSB [10:0], write to Address 0x34 first, followed by
Address 0x35.
No other I
(or more) I
[10:0], write to Address 0x34 first, immediately followed by
Address 0x35.
C sequencer is used when a parameter exceeds eight bits
2
C registers for the parameter in question must be
2
C read or write can take place between the two
2
C writes for the sequence. For example, for HSB
2
Cs. In other words, the top bits of
2
C sequencer holds the already
2
C sequencer relies on the
2
C programming
2
C registers, for
ADV7184
2
C write

Related parts for ADV7184BSTZ